What is unnamed uvm_root type?

Hi.

I got the uvm_root type when I try to print my test case as bewow.
I didn’t get it this situaltion, what am I suppoed to do to resolve unnamed problem?

If I want to connect between some sequence and my sequencer, then how am I suppoed to do ?
Can I just ignore about " uvm_root " ? to connect?

I used printing way as below.

  virtual function void end_of_elaboration_phase(uvm_phase phase);
        uvm_root uvm_top = uvm_root::get();
        super.end_of_elaboration_phase(phase);
        `uvm_info(get_type_name(), $sformatf("Printing environment settings: \n %0s", uvm_top.sprint()), UVM_LOW)
  endfunction

UVM_INFO plain_simple_write_test.sv(49) @ 0: uvm_test_top [plain_simple_write_test] Printing environment settings:
 -----------------------------------------------------------------
Name                         Type                     Size  Value
-----------------------------------------------------------------
<unnamed>                    uvm_root                 -     @1040
  uvm_test_top               plain_simple_write_test  -     @2881
    plain_environment        plain_environment_c      -     @2971
      plain_agent            plain_agent_c            -     @3644
        sequencer            plain_sequencer          -     @3676
          rsp_export         uvm_analysis_export      -     @3733
          seq_item_export    uvm_seq_item_pull_imp    -     @4283
          arbitration_queue  array                    0     -
          lock_queue         array                    0     -
          num_last_reqs      integral                 32    'd1
          num_last_rsps      integral                 32    'd1
        vijay_driver         plain_driver             -     @4314
          rsp_port           uvm_analysis_port        -     @4413
          seq_item_port      uvm_seq_item_pull_port   -     @4364
      virtual_sequencer      plain_virtual_sequencer  -     @3002
        rsp_export           uvm_analysis_export      -     @3060
        seq_item_export      uvm_seq_item_pull_imp    -     @3610
        arbitration_queue    array                    0     -
        lock_queue           array                    0     -
        num_last_reqs        integral                 32    'd1
        num_last_rsps        integral                 32    'd1
-----------------------------------------------------------------

In reply to UVM_LOVE:

Why is this a problem? You should just ignore uvm_root and consider your test as the top level named component.