I'm trying to verify ASYNCHRONOUS-FIFO,
I have listed couple of cases below,
Following are done using UVM Methodology based Verification environment
1. Only read
2. Only write
3. Read and write simultaneously
4. write full
5. read empty
6. full and empty are mutually exclusive
7. simultaneously write_full and read_empty are active ( When read-side-clk is deactivated and other side it is writing)
8. check reset behavior
9. check reset to read/write wake up
I'm considering 2 agents (one for write side and another for read side), can any one let me know their view when and how i can make a decision to used multiple agents/Virtual sequence(er), in this case is it right ??
for case 1 and 2 how can i use virtual sequence ?? ( eg. for third case i use fork-join)
How do i divide its verification phases ?? (not uvm/systemverilog phases literally)
In addition, Structural check is done using Assertions !!