in uvm why all source file extension use.svh why not .sv extension use.?
In reply to Henriques:
This is a reminder to the reader that this file is
`included by another file, and not placed on the compilation command line.
Most tools only recognize *.v and *.sv for Verilog and SystemVerilog source text on the command line. A file with *.svh on the command line would not be recognized as SystemVerilog. An
`include file is always treated in the same language as the file that
`included it.