I am trying to understand ' why TLM2 is required in UVM', and found few points.
UVM 1.1d user guide:
1. A section '2.2 TLM, TLM-1, and TLM-2.0' says that "None of the interfaces provide for explicit timing annotations. TLM-2.0, while still enabling transfer of data and synchronization between independent processes, is mainly designed for high performance modeling of memory-mapped bus-based"
I could not imagined about above application, especially a need to record time while passing ~information~ b/w independent processes.
Also why TLM 2 target specially memory-mapped bus-based system
2. Also it seems that TLM2 is introduced in UVM only to integrate SystemC models.
Please feel free to comments about a need for TLM2 in UVM.