A register contains one RW field(Volatile=0) and another W1C field(Volatile=1)
virtual function void build();
this.FIELD_B = uvm_reg_field::type_id::create(“FIELD_B”,get_full_name());
this.FIELD_B.configure(this, 1, 1, “RW”, 0, 1’h0, 1, 0, 0);
this.FIELD_A = uvm_reg_field::type_id::create(“FIELD_A”,get_full_name());
this.FIELD_A.configure(this, 1, 0, “W1C”, 0, 1’h0, 1, 0, 0);
endfunction: build
regmodel.register_a.FIELD_B.set(1’b1);
regmodel.register_a.update();
While trying to update FIELD_B with 1 RAL sends transaction with both FIELD_A=1 & FIELD_B=1
Why FIELD_A value is being updated here?
While using write method works fine as it send transaction with FIELD_B only set to 1.
regmodel.register_a.FIELD_B.set(1’b1);
regmodel.register_a.write();
Thanks,
Ankit
In reply to Ankit_Patel:
Whenever, update method for any register is called then operation will be performed as follow :
- It will check that, if any field associated with that register needs to updated or not.
- If there is mismatch between mirrored value and desired value of any register field, then with the help of xupdatex() API of each reg field, it will merge the uvm_reg_data upd.
- Here, XupdateX() method, returns the value based on assigned access. for example:
case (m_access)
....
"RW": XupdateX = m_desired;
....
"W1C": XupdateX = ~m_desired;
....
endcase
XupdateX &= (1 << m_size) - 1;
Because of above swapping of desired value in implemented method, you are facing issue with W1C register field.
I don’t think that we can change it. You can use read followed by write method instead of update()