I am new to RAL and I have some doubts in RAL.
(1) is the write and read task of RAL are inbuilt methods of UVM or do we need to create a write and read task with address and data as input arguments in driver(I saw something like this in this link https://www.chipverify.com/uvm/uvm-register-model-example). Where can I see the write and read task?
(2) How the DUT value is getting updated through write and read methods, where the interface connection to DUT is happening after writing to RAL model from sequence?
(2) In so many places it have been mentioned that if we are using RAL model we dont need to bother about physical interface? How this is possible
Our DUT is connected to Driver through interface so if the address bits of the design changes we need to change interface also right?
>> Design registers can be accessed independently of the physical bus interface. i.e by calling read/write methods -- this is the point I am referring to question 3 -- How read and write is connecting to DUT without interface how its possible?