Hey guys!
I’m faced with problem in UVM RAL working with “byte enable interface”.
Prelude.
So let’s assume that we have 32bit AHB bus and we want to execute halfword read access to slave with addr encoding 0-.
So then our read data will be returned at [15:0] lane slice, high data [31:16] in this case not specified so it may contain garbage.
Problem.
File uvm_reg_predictor.svh
In analysis port we get our transfer and start bus2reg function where we did some encoding and return item with valid addr, data and byte_en;
Then when we use get_check_on_read() we did that staff:
if (reg_item.kind == UVM_READ &&
local_map.get_check_on_read() &&
reg_item.status != UVM_NOT_OK) begin
void'(rg.do_check(ir.get_mirrored_value(), reg_item.value[0], local_map));
end
Where reg_item.value[0] it’s full 32bit data from lane.
do_check(): check all fields from register.
But we have byte_en 'b0011 and we can have garbage in [31:16] bits. Why we check all fields there?
Any guess?