UVM RAL: Can we always use backdoor access instead of frontdoor access?

I am new to RAL, while learning the frontdoor and backdoor access, I got to know that fd access uses a bus for accessing the registers in the dut while backdoor access directly communicates with the registers. So, my question is why not always go for backdoor access as it takes zero time instead of frontdoor which takes some simulation time.
Thanks in advance.

In reply to preetam_kale:

I think that beats the whole purpose of having a RAL model in the first place.

Frontdoor access provides a layer of abstraction to the design’s register hierarchy, making it simpler to access these without having to know too much about their implementation. This also comes with an ease of maintenance. Adding to this, it comes with a lot of advantages like the fact that frontdoor access facilitates monitoring of the sequences you inject into the DUT and also allows you to write a whole range of complex test cases and scenarios.

Hope this helps!

Backdoor access is for simulation only to speed up. Real DUT register access happens through frontdoor only i.e. through bus. Once ASIC tapes out, backdoor option is not available. So, it is necessary to verify register access through frontdoor during the verification cycle before tape out.
Thanks.