UVM phases

Say I have both main phase and run phase in my component class with some activities. I know they are supposed to be executed in parallel, I wonder if there is a way to predict the order of execution between these 2 functions

In reply to jeyanthis:

It is not correct that main_phase and run_phase are starting at the same time. The run_phase starts with the pre_reset_phase.
It is a bad idea to use main_phase and run_phase in different components in your UVM testbench.
The project practice shows problems doing this.

Do you mean its not good to use at same component or different components?

In reply to jeyanthis:

You cannot use run_phase and main_phase in the same component. Even in a UVM environment you should follow clear rules and do not mix main_phase and run_phase.
The recommendation is to avoid the sub-phases of the run_phase, i.e. reset_phase, config_phase etc.

In reply to chr_sue:

This is not correct. Each component can have as many phases as it needs. However, we recommend only using the one time-consuming run_phase. Use sequences to control the ordering of different aspects of your test.

As far has the scheduling between phases, it does not matter if the phases are within a single component or spread out in multiple components. Each phase gets collectively scheduled as a group. The problem with mixing the run_phase with the main_phase, is you can’t count on them starting at the same time if you don’t know what other phases are being used that might delay the start of the main_phase.

In reply to dave_59:

So I understand it in this way, when we dont want to have different operations in reset phase, configure phase;we can just have run_phase. Otherwise we can go with reset phase, configure phase and then main_phase.

Alternately we can write different sequences to do differnt opertions and start them inside single run phase.