UVM Framework: Difference in compile order between bench sim Makefile and compile.do

UVM
,
1

I’ve found a subtle difference in the UVM Framework (2021.1) compile order between the bench Makefile and compile.do:

  • In Makefile, the RTL is compiled before the simulation code.
  • In compile.do, the simulation code is compiled before the RTL.

In the second case, any RTL package imports I’ve specified in the simulation files (either manually or through YAML) will not be available when the latter are compiled, leading to a compilation error.

I’d like to suggest that the compile.do template be changed so that the RTL block (pragma uvmf custom dut_compile_dofile_target) is listed before the simulation files, so that the compile order is the same as in the Makefile and the user can make RTL packages available to the simulation in both cases.

2

In reply to tonyle:
Thank you for pointing this out! This is a good suggestion and we’ll capture this for consideration in a future release.