What does the error illegal use “automatic” for a variable?? I havent mentioned automatic anywhere. So what does this error mean? please help me out.
In reply to Muthamizh:
In the UVM we are differentiating like in C between static and automatic variables. static variable are initialized once at compile time.
Could you please show some code which is related to your error message.
In reply to chr_sue:
– Compiling module tvs_apbi2c_top
** Error: ** while parsing file included at …/tvs_apbi2c_env/tvs_apbi2c_env_pkg.sv(33)
** while parsing file included at …/tvs_apbi2c_top/test_list/tvs_apbi2c_test_pkg.sv(34)
** at …/tvs_apbi2c_top/tb_top/tvs_apbi2c_top.svh(32): Illegal use of ‘automatic’ for variable declaration (clock).
THIS IS THE ERROR
interface tvs_apb_intf;
// Interface Clk
logic p_clk;
// Interface address Declaration
logic [31:0] p_addr;
// Interface Data Declaration
logic [31:0] p_wdata;
logic p_write;
logic [31:0]p_rdata;
logic p_enable;
logic p_ready;
logic p_sel;
logic p_resetn;
logic p_silverr;
logic int_rx;
logic int_tx;
THIS IS MY INTERFACE
module tvs_apbi2c_top;
// timing information
timeunit 1ns;
timeprecision 1ps;
reg clock=0;
always #125 clock = ~clock ;
//Instance of the interface
tvs_apb_intf apb_intf();
// instance of the interface
tvs_i2c_intf i2c_intf();
i2c DUV(.PCLK(clock),
.PRESETn(reset),
.PADDR(apb_intf.p_addr),
.PWDATA(apb_intf.p_wdata),
.PWRITE(apb_intf.p_write),
.PSELx(apb_intf.p_sel),
.PENABLE(apb_intf.p_enable),
.PREADY(apb_intf.p_ready),
.PSLVERR(apb_intf.p_silverr),
.INT_TX(apb_intf.int_tx),
.INT_RX(apb_intf.int_rx),
.PRDATA(apb_intf.p_rdata),
//I2C OUTPUT
.SDA_ENABLE(),
.SCL_ENABLE(),
.SDA(),
.SCL());
THIS IS THE TOP MODULE WHERE IT SHOWS THE ERROR
In reply to Muthamizh:
You are facing more errors.
See
** Error: ** while parsing file included at …/tvs_apbi2c_env/tvs_apbi2c_env_pkg.sv(33)
What is line 32 in tvs_apbi2c_top.svh
How do you compile your code? Do you have includes in your toplevel module or do you work with packages?
BTW, you should never use the reg data type in SV code. Replace it by logic.
In reply to chr_sue:
line 32 is where clock has been declared. i compile it using script. and im working with packages.
In reply to Muthamizh:
Then line 32 is
reg clock=0;
It looks like this does not cause your error. It comes from an earlier error in your code.
What do you include in your env_pkg?
In reply to Muthamizh:
By assigning an initial value, it is implicitly declared as automatic. Remove the initial value and the error will go away.