I need a broad understanding of how the architecture should if be in UVM for transcations to the driver depends on the previous transcation .I do not want to have any logic in the driver . Typically how are these kind of scenarios handled as per uvm guidelines.
In reply to santosh tej chiriki:
This is the standard approach. With get_next_item(9 or get() you are retrieving a seq_item from the sequencer. With item_don() or put you can put back a response seq_item to the sequence.
See the details in the code examples of the Verification Academy for get_next_item/item_done:
Bidirectional item_done
For get/put
bidirectional get/put
In reply to madcow:
I need a broad understanding of how the architecture should if be in UVM for transcations to the driver depends on the previous transcation .I do not want to have any logic in the driver . Typically how are these kind of scenarios handled as per uvm guidelines.
The UVM gives you freedom. It is up to you to make a solution.
A sequence is defining how sequence items will be created. If you have dependencies between the creation of seq_items you can implement his in the sequence. Any other solution involving uvm_components restricts the reusability of your UVM environment.