"Too many actual arguments" error

Hi All,
I am a newbie in UVM verification methodology. please help me out with this error. I tried to debug at my best but still i am missing something. i am running simple spi_read_write test and i am getting the below error.

*E,TOOMAC (/cad/adi/apps/cadence/incisive/linux/15.10-s14/tools/methodology/UVM/CDNS-1.1d/sv/src/base/uvm_registry.svh,66|12): Too many actual arguments.
function new(string name = “read_write_seq”);
|
ncelab: *E,TOOMA2 Task or function definition (or class definition) for previous error message.----error from my sequence class

My sequence code:
class read_write_seq extends spi_slave_tb_vseq;

`uvm_object_utils(read_write_seq)
spi_slave_base_seq p_seq;

function new(string name = “read_write_seq”);
super.new(name);
endfunction : new

virtual task body();
for(int i=0;i<10;i++)begin
uvm_do_on_with(p_seq,p_sequencer,{_spi_cmd inside {SINGLE_WRITE_INSTR};}) #100ns; uvm_do_on_with(p_seq,p_sequencer,{_spi_cmd inside {SINGLE_READ_INSTR};})
end
endtask: body

endclass: read_write_seq
My test code:
class read_write_test extends spi_slave_tb_base_test;
read_write_seq seq;
`uvm_component_utils (read_write_seq)

 // Constructor

function new(string name = “read_write_test”, uvm_component parent = null);
super.new(name, parent);
endfunction : new

// Build phase
virtual function void build_phase(uvm_phase phase);
super.build_phase(phase);
// Create the virtual sequence
seq = read_write_seq::type_id::create(“seq”, this);
void’(seq.randomize());
endfunction : build_phase

// Main phase
virtual task main_phase(uvm_phase phase);
super.main_phase(phase);
`uvm_info(“START_SEQ”, “Invoking read_write_seq”, UVM_LOW)
seq.starting_phase = phase;
// Start the virtual sequence on the virtual sequencer
seq.start(env.vsqr);
endtask : main_phase

endclass : read_write_test

Debugging this error has become tough as it is not showing much of clarity. Is anypne has idea on this?

Copy paste leaves bug in code.

You have used sequence type in component factory registration.


`uvm_component_utils (read_write_seq) // this should be read_write_test

Regards,
Kerul Modi

In reply to kerulmodi:

Yes it is working now. Thanks a lot Kerul.