Test feature verification

for testing a particular feature which is more suitable
a)unit level verification
b)module level verification
c)system level verification

In reply to divyadm:

There is as very simple answer:
(1) unit level features are tested on unit level,
(2) module level features are tested on module level,
(3) System level features are tested on system level

Because you cannot test system level features on unit or module level.
But the key question is how much unit and module level testing do you need.
This depends on your application.

In reply to chr_sue:

thank you for your reply, I got your context but my question is having done with unit/ module level verification , system level verification.
One of the key feature is missed, now where will you verify it in the unit level or module level or system level

I believe it to be at system level, since the feature which was missed needs to be added back and need to check for its integration and interface with top level

In reply to divyadm:

There is no common answer. It depends how you can test these Features. If it’s possible to do this from the System Level you should do this from there. If not you have to move to a lower level. If you are selling the unit or module Level as IP cores you have to move down to this Level.

In reply to divyadm:

Hi,

To verify the feature for all possible modes, you need to go with the Unit Level verification. Controlling inputs of the unit according to protocol could be a difficult task here. But, exhaustiveness can be reached here as for module/system verification, input set reaching to the Unit could be limited.

Next step is to check, this Unit(having the feature implemented) integration to the module and verifying the integration here.

If the feature you have propagates to different system module regions which are not covered previously, then you need to generate system level use can for this particular feature as well. See where this feature/signals dependent on it propagates. This could be a difficult observation indeed!

Basically you’ll be doing everything. Two main things to note are exhaustiveness of stimuli(Block Level e.g.Formal Verification) and integration checks(on System Level, or Module if function is contained in Module only).

In reply to MayurKubavat:

Again, there is no common Approach. It depends on the complexity of your design. If you have a multi-Million gate design this might be valid, differentiating between unit, module and SoC Level. If your design is a lot more smaller you’ll not do this.