Suppressing TPRGED Warning Message

UVM
1

Hi,

The message I would like to suppress (or demote) is TPRGED.
It seems to be reported when a specific type name is registered with factory more than once.

UVM_WARNING @ 0: reporter [TPRGED] Type name 'ip_0_reg' already registered with factory. No string-based lookup support for multiple types with the same type name.

I’ve already tried +uvm_set_action or set_report_id_action.
I’ve also tried to catch the warning message by making use of uvm_report_catcher.
But none of them seem to work.

Looks like this TPRGED warning is not reported from the component under uvm_test_top.
(I’m not so sure but maybe it’s reported from UVM root?)
Anyways, I would like to get rid of this warning message but can’t find the way to do so.
Could anyone give some help?

+) Here’s the reason for the warning.
I’m working on a subsystem-level testbench and it reuses some components from IP-level testbench.
IP-level environment comes with its own IP register model.
Subsystem-level environment also has a register model which includes register models of the IPs.
And that’s why the same type name is registered with factory twice.

++) EDA playground link

Best regards,
Jung Ik Moon

2

In reply to Jung Ik Moon:

You should not be registering UVM register modules with the factory, thus remove the `uvm_object_utils macros. its a lot of unnecessary overhead.

3

In reply to dave_59:

In reply to Jung Ik Moon:
You should not be registering UVM register modules with the factory, thus remove the `uvm_object_utils macros. its a lot of unnecessary overhead.

Thanks for the answer. I agree.

But what if it’s not possible to modify the register model?
For example, suppose the register model is generated by a tool and the tool may not have an option to remove `uvm_object_utils macros.
I guess modifying the register model manually every time it’s generated won’t be a good option.
Or, it’s also possible that the register model is part of 3rd-party IP provided by the vendor and the modification is restricted.
In any case, is it possible to suppress/demote TPRGED warning?

4

In reply to Jung Ik Moon:

It’s not possible to get rid of that warning because:

  1. The warning is the result of a static initialization inside the uvm_object_registry class. This occurs before you have a change to set any actions, overrides, extensions, or report catchers.
  2. The command line options do not work on messages outside the uvm_component hierarchy. See 0004435: Move command-line report methods outside of uvm_component - Accellera Mantis

It is still not clear to me why you need to compile the same register model in two different packages. Why are you not compiling it into a package once and importing it where needed?

5

In reply to dave_59:

It’s not possible. I see.
Thanks for the explanation.

In reply to Jung Ik Moon:
It is still not clear to me why you need to compile the same register model in two different packages. Why are you not compiling it into a package once and importing it where needed?

Here’s the situation.
Let’s say that the subsystem contains three IPs, ‘A’, ‘B’ and ‘C’.
It has a register model for all these IPs as below.

// Register model for subsystem testbench
- Block ABC
  - Block A
    - Register a
  - Block B
    - Register b
  - Block C
    - Register c

The subsystem testbench imports an environment for IP ‘A’ (developed by others) to reuse some components.
And the package includes a register model for IP ‘A’.

// Register model for IP A testbench
- Block A (duplicate part)
  - Register a
6

In reply to Jung Ik Moon:

You can create a package for all the blocks, or create a package for each block. It does not matter if you define a register block but do not use it.

package BlocksABC; 
  - Block A
    - Register a
  - Block B
    - Register b
  - Block C
    - Register C
endpackage
package IP_ABC;
 import BlocksABC::*:
  -BlockABC
    -instantiate A
    -instantiate B
    -instantiate C
endpackage
package IP_A;
 import BlocksABC::*:
  -instatiate A
endpackage
7

In reply to dave_59:

Thanks for the suggestion.
That way, we can avoid compiling the same register again.
Though, I wonder if that would be the best option in terms of reusability.

For exmaple, suppose ‘A’ is a very common IP and can be used in many other systems.
In one system which requires ‘BlocksABC’, your example will work.
But, in another system which requires ‘BlocksAXYZ’, the package ‘IP_A’ should be modified to import ‘BlocksAXYZ’ instead.
Which means it requires manual work for each system that uses IP ‘A’.
Please let me know if you have something to share about it.

As I already got the answer for demoting TPRGED warning, I will go ahead and mark your previous answer as the solution.

8

In reply to Jung Ik Moon:

Then you need to use the package for each block. All you need to do is replace the
`include “blockA.sv” with
import blockA::*;. Then change your scripts to compile the packages. There’s no harm in compiling all the packages even if you only use some of them.

9

In reply to dave_59:

Understood.
I appreciate your explanation.