Simple but complete UVM example

UVM
1

Hi to All,

I’m novice to the SV methodology world and would like to try out few example code of UVM.
I tried to work thru the UVM_1.1 UBUS example bundle but I find it too difficult to understand and
get hang of various constructs used.

Is there a better & user friendly example available anywhere which I can use a reference for all my
future projects on SV-UVM?

Failed to get a complete example by googling and hence I think this forum is the right place to get this answer.

Thanks
/Sachin

2

Hi Sachin

You can refer the example on Simple UVM Testbench - EDA Playground

Also UVM Guide for Beginners – Pedro Araújo & UVM – ClueLogic

Hope this would get you started, may be you can also refer to WWW.TESTBENCH.IN - Easy Labs : UVM

-BR
Hash

3

The UVM Cookbook has many small examples with documentation explaining each example. Code Example Downloads | Verification Academy

4

In reply to Hash:

Thanks Alot for the data.

5

There are the two best approaches to starting with the smallest UVM Reference Design:

Start by implementing a very simple UVM testbench with a simple COUNTER DUT or MEMORY DUT.
Follow these two procedures:

  1. Basic UVM | Universal Verification Methodology | Verification Academy

  2. UVM Framework | Verification Academy

Here is an excellent detailed description of the Minimum UVM Code Templates (of Classes, Methods, Macros) required to implement UVM:

https://verificationacademy.com/sessions/dvcon-2015/paper-presentation/UVM-Rapid-Adoption-A-Practical-Subset-of-UVM

The UVM Cookbook has many small examples with documentation explaining each example. Code Example Downloads | Verification Academy