Hi,
I’m getting scoreboard comparison error, but monitor values are responding correctly.
UVM_INFO uvm_test_top.env.tx_agent.monitor [TX_UART_MONITOR] Wrote transaction O_RX_BYTE =3f
UVM_INFO uvm_test_top.env.rx_agent.driver [RX_UART_DRIVER] I_TX_DV = 0 I_TX_BYTE =3f
UVM_ERROR /home/runner/testbench.sv(402) @ 82820: uvm_test_top.env.scoreboard [ACTUAL != EXPECTED] EXPECTED=I_TX_BYTE =xx ACTUAL= O_RX_BYTE =xx
https://www.edaplayground.com/x/3EVR
Thanks,
In reply to Remo:
Your Edaplayground example does not run. Ther is so much commented code inside, including in te monitor.
What can be uncommented?
In reply to chr_sue:
rx_agent.driver.drv_to_sb.connect(scoreboard.input_fifo.analysis_export);
uvm_info("environment","rx_driver connected scoreboard",UVM_LOW); tx_agent.monitor.tx_item_collected_port.connect(scoreboard.output_fifo.analysis_export);
uvm_info(“environment”,“tx_monitor connected to scoreboard”,UVM_LOW);
Here am connecting driver to scoreboard for EXPECTED and tx_monitor for ACTUAL …
where is te monitor monitor?
In reply to Remo:
First you should clean up the run_phase of your test like this:
task run_phase(uvm_phase phase);
rx_uart_sequence seq;
seq = rx_uart_sequence::type_id::create("seq");
`uvm_info("uart_test","Raised objection",UVM_LOW);
phase.raise_objection(this, "starting_seq");
// #100;
seq.start(env.rx_agent.sequencer);
// #100000;
phase.drop_objection(this, "finished_seq");
`uvm_info("uart_test","Droped objection",UVM_LOW);
endtask: run_phase
endclass: uart_test
Secondly the output_fifo does not have an entry. The simulation stucks there.
Adding `uvm_info after the get shows this.
`uvm_info("scoreboard ` run task", "Waiting for EXPECTED values",UVM_MEDIUM)
input_fifo.get(input_sequence_item);
`uvm_info("scoreboard run task input", input_sequence_item.convert2string, UVM_MEDIUM);
output_fifo.get(output_sequence_item);
`uvm_info("scoreboard run task output", output_sequence_item.convert2string, UVM_MEDIUM);
Finally the drop_objection is stopping your simulation.
In reply to Remo:
I was edbugging something more and found the tx_uart_monitor does not extract seq_items due to the following condition:
forever begin
@(posedge vif.i_Clock);
if(vif.o_RX_DV == 1'b1)begin // this condition is never true
@(posedge vif.i_Clock);
transaction.O_RX_BYTE = vif.o_RX_Byte;
`uvm_info(get_type_name(), $sformatf("O_RX_BYTE=%h",transaction.O_RX_BYTE), UVM_MEDIUM);
// @(posedge vif.i_Clock);
tx_item_collected_port.write(transaction);
`uvm_info("TX_UART_MONITOR", $psprintf("Wrote transactio %s",transaction.convert22string()), UVM_LOW);
end
end
In reply to Remo:
can i give rand_values through uvm test class over a uvm_sequence ??
class seq_item extends uvm_sequence_item;
rand A;
rand B;
endclass
.
.
.
class test extends uvm_test;
// from here can i give values
endclass
In reply to Remo:
The seq_item should be created and randomized in sequence instead of test. That is the correct flow.