Reset behaviour of uvm componests in uvm reset_phase

UVM
1

Hey all,
I want to describe a reset behaviour for one of my usfer defined uvm components and I’m wondering does reset_phase get executed each time reset is active ? assuming that i want to enable reset multiple times in my sequence.

2

In reply to abdelaali_21:

No, the UVM has no knowledge of what it means to reset your DUT. All of the UVM’s time-consuming phases are just placeholders for an ordered set of procedures. There are no guidelines as what to put in each time-consuming phase. We reccomend just using the UVM run_phase and use sequences instead of phase to organize the procedures you need in your test.

See:

https://verificationacademy.com/verification-horizons/june-2012-volume-8-issue-2/On-the-Fly-Reset