Even though I have added the condition in the report catcher, still it is unable to catch. Can anyone help me what I am doing wrong or any new solution to suppress to those errors.
In reply to sumanth291092:
Code:
class report_catcher extends uvm_report_catcher;
bit err_demoted;
`uvm_object_utils(report_catcher)
function new(string name=“report_catcher”);
super.new(name);
endfunction : new
function action_e catch();
if ((get_severity() == UVM_ERROR) && ((get_message() == “-----### I2C ERROR : sending data, expected ack not correct ###-----”) || (uvm_is_match(“/-----### DATA BIT SEND IS NOT ACKNOWLEGED /”,get_message())) || (uvm_is_match(“/I3C_MST_DRIVEN_EVEN_PARITY_FOR_PVT_WDATA - /”,get_message())) || (uvm_is_match(“/I3C_MSG_WITH_UNALLOCATED_DYNAMIC_ADDR - /”,get_message())) || (uvm_is_match(“/I3C_STOP_FLWD_BY_DATA - /”, get_message())) || (uvm_is_match(“/I3C_STOP_BTW_DATA_9_BITS - /”, get_message())) || (uvm_is_match(“/I3C_MST_DRIVEN_EVEN_PARITY_FOR_CCC_BYTE - /”, get_message())) || (uvm_is_match(“/I3C_BCST_CCC_ENTAS0_WITH_WDATA - /”, get_message())) || (uvm_is_match(“/The START SETUP TIME shall not be more than SCL HIGH TIME /”, get_message())) || (uvm_is_match(“/I3C_MST_DRIVEN_EVEN_PARITY_FOR_BCST_CCC_WDATA - /”, get_message())) || (uvm_is_match(“/I3C_RSTART_BTW_DATA_9_BITS - /”, get_message())) || (uvm_is_match(“/I3C_MST_DRIVEN_EVEN_PARITY_FOR_DAR - /”, get_message())) || (uvm_is_match(“/I3C_7E_RD_AFTER_CCC_ENTDAA_FLWD_BY_NACK - /”, get_message())) || (uvm_is_match(“/I3C_7E_RD_AFTER_CCC_ENTDAA_FLWD_BY_NACK - /”, get_message())) || (uvm_is_match(“/I3C_VAL_NOT_7E_RD_DURING_DAA - /”, get_message())) || (uvm_is_match(“/I3C_7E_WR_FLWD_BY_NACK - /”, get_message()))|| (uvm_is_match(“/No address to select from addr_arr/”, get_message())) || (get_id()== “rst_int_on”) || (get_id()==“wr_seq”) || (uvm_is_match(“/RESET NIRQ register read back is incorrect!!/”, get_message())) ))
begin
set_severity(UVM_INFO);
err_demoted = 1;
end
return THROW;
endfunction : catch
endclass : report_catcher
Sim.log
UVM_ERROR /eda/local/tools/mentor/questa_vip/2021.4_20211024/questa_mvc_src/sv/i3c/sequence_lib/base/i3c_api.svh(1511) @ 2164522750: uvm_test_top.i3c_env.dev_mst_agent.sequencer@@rd_seq**[rd_seq] No address to select from addr_arr**
UVM_ERROR /eda/dm/home/skotareddy/jhr3023/v1a/digital/chip/verif/seq/power_up_seq.sv(219) @ 2166231250: uvm_test_top.i3c_env.dev_mst_agent.sequencer@@pwrup_seq [rst_int_on] RESET NIRQ register read back is incorrect!!
In reply to sumanth291092:
You should specify what your report_catcher should do. Your description is unclear.
And your catch function should start to get the current status and afterwards doing your changes like this:
function action_e catch;
uvm_severity severity = get_severity();
string id = get_id();
uvm_action action = get_action();
string message = get_message();
int verbosity = get_verbosity();
if (severity == UVM_WARNING) //demoting all UVM_WARNING to UVM_INFO
set_severity(UVM_INFO);
if (severity == UVM_ERROR) // UVM_ERROR goes not further
return CAUGHT;
return THROW; // all other messages are thrown to other report_catcher
endfunction
In reply to chr_sue:
HI,
I have tried the solution but had no luck in capturing those errors. There are other UVM ERRORS that are being suppressed but not the following.
Following errors are not being suppresed:
UVM_ERROR /eda/local/tools/mentor/questa_vip/2021.4_20211024/questa_mvc_src/sv/i3c/sequence_lib/base/i3c_api.svh(1511) @ 2164522750: uvm_test_top.i3c_env.dev_mst_agent.sequencer@@rd_seq [rd_seq] No address to select from addr_arr
UVM_ERROR /eda/dm/home/skotareddy/jhr3023/v1a/digital/chip/verif/seq/power_up_seq.sv(219) @ 2166231250: uvm_test_top.i3c_env.dev_mst_agent.sequencer@@pwrup_seq [rst_int_on] RESET NIRQ register read back is incorrect!!
In reply to sumanth291092:
Could you please show the whole related code including the construction of your report_catcher.
In reply to chr_sue:
class my_msg_catcher extends uvm_report_catcher;
bit err_demoted;
`uvm_object_utils(my_msg_catcher)
function new(string name="my_msg_catcher");
super.new(name);
endfunction
function action_e catch;
uvm_severity severity = get_severity();
string id = get_id();
uvm_action action = get_action();
string message = get_message();
int verbosity = get_verbosity();
if (severity == UVM_WARNING) //demoting all UVM_WARNING to UVM_INFO
set_severity(UVM_INFO);
if (severity == UVM_ERROR) // UVM_ERROR goes not further
return CAUGHT;
return THROW; // all other messages are thrown to other report_catcher
endfunction
endclass : my_msg_catcher
Test:
`ifndef CHIP_PWRUP_FB_I3C_BYPASS_TEST__SV
`define CHIP_PWRUP_FB_I3C_BYPASS_TEST__SV
class chip_pwrup_fb_i3c_bypass_i3c_test extends i3c_base_test;
my_msg_catcher rpt_catcher;
`uvm_component_utils(chip_pwrup_fb_i3c_bypass_i3c_test)
function new(string name, uvm_component parent);
super.new(name,parent);
endfunction: new
function void build_phase(uvm_phase phase);
super.build_phase(phase);
rpt_catcher = my_msg_catcher::type_id::create(.name("rpt_catcher"),.contxt(get_full_name()));
chip_cfg.chipSetting = TIME_OPTIMAL;
chip_cfg.opSetting = IRQ;
endfunction
/*function void set_report_severity_override( uvm_severity UVM_ERROR,
uvm_severity UVM_WARNING);
endfunction */
task run_phase(uvm_phase phase);
chip_pwrup_fb_i3c_bypass_seq test_seq;
super.run_phase(phase);
phase.raise_objection(.obj(this));
test_seq=chip_pwrup_fb_i3c_bypass_seq::type_id::create(.name("test_seq"),.contxt(get_full_name()));
uvm_report_cb::add(null, rpt_catcher);
test_seq.start(.sequencer(i3c_env.dev_mst_agent.m_sequencer));
uvm_report_cb::delete(null, rpt_catcher);
phase.drop_objection(.obj(this));
endtask
endclass: chip_pwrup_fb_i3c_bypass_i3c_test
`endif
In reply to sumanth291092:
I have modified the below code to match your error message and it is working as expected.
// Code your testbench here
// or browse Examples
import uvm_pkg::*;
`include "uvm_macros.svh"
program tb;
class transaction extends uvm_object;
rand bit[3:0] data;
rand bit[5:0] addr;
rand bit wr_en;
`uvm_object_utils_begin(transaction);
`uvm_field_int(data,UVM_ALL_ON)
`uvm_field_int(addr,UVM_ALL_ON)
`uvm_field_int(wr_en,UVM_ALL_ON)
`uvm_object_utils_end;
function new (string name = "transaction");
super.new(name);
endfunction
endclass
// comp_a has 1 UVM_LOW and 1 UVM_MEDIUM message
class comp_a extends uvm_component;
`uvm_component_utils (comp_a)
uvm_analysis_port #(transaction) broadcast_port;
function new (string name = "comp_a", uvm_component parent);
super.new(name,parent);
endfunction
function void build_phase(uvm_phase phase);
broadcast_port = new("broadcast_port",this);
endfunction
task run_phase (uvm_phase phase);
transaction tx;
tx = transaction::type_id::create("tx", this);
void'(tx.randomize());
`uvm_info(get_type_name(),$sformatf(" tranaction randomized"),UVM_LOW)
tx.print();
`uvm_info(get_type_name(),$sformatf(" tranaction sending to comp_c"),UVM_MEDIUM)
broadcast_port.write(tx);
endtask
endclass
// comp_b has 1 UVM_HIGH and 1 UVM_LOW messages
class comp_b extends uvm_component;
`uvm_component_utils (comp_b)
uvm_analysis_port #(transaction) aport_send;
function new (string name = "comp_b", uvm_component parent);
super.new(name,parent);
endfunction
function void build_phase(uvm_phase phase);
aport_send = new("aport_send",this);
endfunction
task run_phase (uvm_phase phase);
transaction trans;
trans = transaction::type_id::create("trans", this);
trans.data = 4'h3;
trans.addr = 6'h10;
trans.wr_en = 1;
`uvm_info(get_type_name(),$sformatf(" tranaction not randomized"),UVM_HIGH)
trans.print();
`uvm_info(get_type_name(),$sformatf(" tranaction sending to comp_c"),UVM_LOW)
aport_send.write(trans);
endtask
endclass
// comp_c has 2 UVM_LOW messages
`uvm_analysis_imp_decl(_comp_a)
`uvm_analysis_imp_decl(_comp_b)
class comp_c extends uvm_component;
`uvm_component_utils (comp_c)
uvm_analysis_imp_comp_a #(transaction,comp_c) comp_a_export;
uvm_analysis_imp_comp_b #(transaction,comp_c) comp_b_export;
function new (string name = "comp_c", uvm_component parent);
super.new(name,parent);
endfunction
function void build_phase(uvm_phase phase);
comp_a_export = new ("comp_a_export",this);
comp_b_export = new ("comp_b_export",this);
endfunction
function void write_comp_a (transaction t);
`uvm_info(get_type_name(),$sformatf(" transaction Received in scoreboard comp_a"),UVM_LOW)
t.print();
endfunction
function void write_comp_b (transaction tr);
`uvm_info(get_type_name(),$sformatf(" transaction Received in scoreboard comp_b"),UVM_LOW)
`uvm_error (get_type_name(),"Error in comp_c");
tr.print();
endfunction
endclass
// Env has 1 UVM_DEBUG message
class my_env extends uvm_env;
`uvm_component_utils(my_env)
comp_a test_a;
comp_b test_b;
comp_c test_c;
function new (string name = "my_env", uvm_component parent=null);
super.new(name,parent);
endfunction
function void build_phase(uvm_phase phase);
test_a = comp_a::type_id::create("test_a",this);
test_b = comp_b::type_id::create("test_b",this);
test_c = comp_c::type_id::create("test_c",this);
endfunction
function void connect_phase(uvm_phase phase);
test_a.broadcast_port.connect(test_c.comp_a_export);
test_b.aport_send.connect(test_c.comp_b_export);
`uvm_info ("my_env", "Demonstrating UVM_DEBUG message from my_env",UVM_DEBUG);
endfunction
endclass
class my_report_catcher extends uvm_report_catcher;
`uvm_object_utils (my_report_catcher)
function new (string name = "");
super.new(name);
endfunction
function action_e catch();
if ((get_severity() == UVM_ERROR) && ((uvm_is_match("RESET NIRQ register read back is incorrect!!", get_message())) )) begin
// get_client().die();
set_severity(UVM_INFO);
end
return THROW;
endfunction
endclass : my_report_catcher
// Test has 1 uvm_full and 1 uvm_low messages
class base_test extends uvm_test;
`uvm_component_utils(base_test)
my_env env;
my_report_catcher rc;
function new(string name = "base_test",uvm_component parent=null);
super.new(name,parent);
endfunction : new
virtual function void build_phase(uvm_phase phase);
super.build_phase(phase);
env = my_env::type_id::create("env", this);
rc = new("rc");
uvm_report_cb::add(null, rc);
endfunction : build_phase
function void end_of_elaboration();
print();
endfunction
virtual task run_phase(uvm_phase phase);
phase.raise_objection(this);
`uvm_error ("Inside_test","RESET NIRQ register read back is incorrect!!");
#500
`uvm_error ("Inside_test","Example to demonstrate UVM_LOW from base_test");
phase.drop_objection(this);
endtask
endclass : base_test
initial begin
run_test("base_test");
end
endprogram
In reply to rag123:
Hi,
I Have tried the solution given, still no luck. Those UVM_ERRORS are not being suppressed.
I can’t understand what is problem
In reply to sumanth291092:
Your requirement is not clear to me. You can demote a UVM_ERROR depending on the ID (1st argument in the uvm_error) or on the message (2nd arg). Please show the codelines of uvm_error you want to suppress.