hi
i am using bit[31:0]mem[int] to create associative memory in a storage class. and trying to call the data stored in storage class in driver.
how do i call as i am calling
addrr=raddr_q.pop_back();
class_name_handle.mem[addrr]
showing error
Unresolved reference to ‘mem’ in $root.mem.
is there any solution calling associative array from other class to driver class?
In reply to Er. Shipra:
Two things:
(1) you are calling the method pop_back which is not defined on an assiciative array.
(2) You should show the code which causes the error.
In reply to chr_sue:
hi
storage strg;
int RADDR_Q[$];
i am getting this class in driver and using it.
addrr=RADDR_Q.pop_back();
if(strg.mem.exists(addrr))
$display(“memory”,mem);
vif.rdata<=strg.mem[addrr];
In reply to Er. Shipra:
To clarify:
You do not show what storage is.
RADDR_Q is a queue. Then pop_back is fine.
Where is the associative aray?
In reply to chr_sue:
hi
here is the code
class axi_storage extends uvm_component;
`uvm_component_utils(axi_storage)
bit[31:0]mem[int];
function new(string name, uvm_component parent);
super.new(name,parent);
endfunction
endclass :axi_storage
driver class:-
class axi_driver extends uvm_driver#(axi_transaction);
axi_storage strg;
bit[31:0] dwdataQ1 [31:0];
int ADDR_Q[$]; int RADDR_Q[$];
if(!uvm_config_db#(axi_storage)::get(this,"*","axi_storage",strg))
`uvm_fatal("NO_AGNT_CFG",{"storage must be set for:",get_full_name(),".strg"})
if(cfg.master_slave_select == AXI_MASTER)
begin
for(int j=0;j<=tx.wlen;j++)
begin
@(posedge vif.aclk);
addr=ADDR_Q.pop_back;
strg.mem[addr]=dwdataQ1[j];
if(cfg.master_slave_select == AXI_SLAVE)
begin
for(int i=0;i<=tx.rlen;i++)
begin
@(posedge vif.aclk);
$display("\tQueue_1 size in read data is %0d",RADDR_Q.size());
addrr=RADDR_Q.pop_back();
if(strg.mem.exists(addrr))
$display("memory",mem);
vif.rdata<=strg.mem[addrr];
In reply to Er. Shipra:
hi, this is snapshot of my code,
q:-do i need to collect it from monitor, if yes how?
In reply to chr_sue:
hi
if(strg.mem.exists(addrr))
$display(“memory”,mem);
error was because or this line, but still i am not getting my data, it is zero only
In reply to Er. Shipra:
In your driver you do a get on the config_db
if(!uvm_config_db#(axi_storage)::get(this,“*”,“axi_storage”,strg))
to retrieve the object of your storage from the config_db. Where are you doing the set of this object?
In reply to chr_sue:
hi
in agent…
class axi_agent extends uvm_agent;
axi_storage strg;
function new(string name,uvm_component parent);
super.new(name,parent);
strg = axi_storage::type_id::create("strg",this);
uvm_config_db#(axi_storage)::set(this,"*","axi_storage",strg);
endfunction
In reply to Er. Shipra:
For me it is totally unclear in which tasks/function you are doing what.
Does this code belong to your run_task in the driver?
@(posedge vif.aclk);
addr=ADDR_Q.pop_back;
strg.mem[addr]=dwdataQ1[j];
if(cfg.master_slave_select == AXI_SLAVE)
begin
for(int i=0;i<=tx.rlen;i++)
begin
@(posedge vif.aclk);
$display("\tQueue_1 size in read data is %0d",RADDR_Q.size());
addrr=RADDR_Q.pop_back();
if(strg.mem.exists(addrr))
$display("memory",mem);
vif.rdata<=strg.mem[addrr];
In reply to chr_sue:
hi
yes
i made task and calling these task in run
one task is controlled by master and other is by slave
this is my write task in master:-
if(cfg.master_slave_select == AXI_MASTER)
begin
for(int j=0;j<=tx.wlen;j++)
begin
@(posedge vif.aclk);
addr=ADDR_Q.pop_back;
strg.mem[addr]=dwdataQ1[j];
this is my read task by slave
if(cfg.master_slave_select == AXI_SLAVE)
begin
for(int i=0;i<=tx.rlen;i++)
begin
@(posedge vif.aclk);
$display("\tQueue_1 size in read data is %0d",RADDR_Q.size());
addrr=RADDR_Q.pop_back();
if(strg.mem.exists(addrr))
$display("memory",mem);
vif.rdata<=strg.mem[addrr];
these are two tasks,write and read. but master and slave can’t see each other as controlled by configuration. so, i amde a separate class visible to both, and i am writing on it
but still slave is not able to get the data
In reply to Er. Shipra:
You want to share 1 resource between 2 different components (master and slave). Is this what you want to do?
In reply to Er. Shipra:
There are di8fferent solutions possible. In my eyes the most elegant solution is the
uvm_queue
.
See the UVM Reference Manual for the detail