Reg_model predefine reset regs value check error (quirky register?)

UVM
,
1

Hello everyone!
Practising uvm with i2c device. It has registers like this:

i2c_reg_map.add_reg ( I2C_PRERlo_reg , 3’b000 , “RW” );
i2c_reg_map.add_reg ( I2C_PRERhi_reg , 3’b001 , “RW” );
i2c_reg_map.add_reg ( I2C_CTR_reg , 3’b010 , “RW” );
i2c_reg_map.add_reg ( I2C_TXR_reg , 3’b011 , “WO” );
i2c_reg_map.add_reg ( I2C_RXR_reg , 3’b011 , “RO” );
i2c_reg_map.add_reg ( I2C_CR_reg , 3’b100 , “WO” );
i2c_reg_map.add_reg ( I2C_SR_reg , 3’b100 , “RO” );

2 registers have same address but changes its values if you write or read to/from them

So, i try predefine sequense uvm_reg_hw_reset_seq and in log i see:

%I-( uvm_reg_hw_reset_seq.svh: 115) [uvm_reg_hw_reset_seq] { 9500} Verifying reset value of register reg_model.I2C_TXR_reg in map “reg_model.i2c_reg_map”…
%E-(_______uvm_reg_cbs.svh:482)[UVM/REG/WRTEONLY]{________________9500} reg_model.I2C_TXR_reg is write-only. Cannot call read() method.
%E-(_uvm_reg_hw_reset_seq.svh:_122)[uvm_reg_hw_reset_seq]{________________9500} Status was UVM_NOT_OK when reading reset value of register “reg_model.I2C_TXR_reg” through map “reg_model.i2c_reg_map”.

Sequence try to read from WO register, but it shouldn’t do it.
How to solve this error?

2

In reply to Levard:

See Section 27.2 of the Class Reference Manual 1.2, it describes how to exclude a register or register block with:

uvm_resource_db#(bit)::set({“REG::”,regmodel.blk.get_full_name(),“.*”},“NO_REG_HW_RESET_TEST”, 1, this);

3

In reply to dhserfer:

Thanks, it works for me, but is this the only decision? Other way to write “quirky_register”?