Register blocks and map

UVM
,
1

Hello,
I have for example, 4 channels, and each channel has the same register definitions.
For instance, channel 0 to 3, each has reg0 and reg1.
I would like first to verify those register in front door mode.
So I have defined register 0 and reg1 like this:
class reg0 extends uvm_reg;
uvm_object_utils(reg0) //fields: //fields_cons //new //build endclass class reg1 extends uvm_reg; uvm_object_utils(reg1)
//fields:
//fields_cons
//new
//build
endclass

And then I would like to construct a register block with a map.
So, my question is, for the four channels, do I need to construct each channel its own register blocks and map, or is there a way to modulize the code and reuse the code? I don’t want to copy and paste a lot of similar code.

Thanks in advance.
Rui

2

In reply to rma:

I’m not sure if I understood your question correctly. If you have the same register block for each channel you can implement 4 instances of the same model.