Read Method in UVM RAL

Hello all
I just wanna know read API in the UVM RAL model works? Say for example, If I call “reg_block.reg_name.read(status,rdata)” in sequences, how the rdata value is getting updated.? which method in the RAL adaptor is used? Is it bus2reg or reg2bus or both methods? I want to know the flow of this API method?

what is the practical usage of the desired and mirrored value of RAL? Like in a real-time scenario!

In reply to Malai_21:

The adapter code is going to be invoked differently depending on how you have set up prediction. If you are using explicit prediction, both bus2reg() and reg2bus() will be called at some point but if you are using implicit prediction only bus2reg() will be called.

Explicit prediction is recommended (see VA articles on the register model to understand why but it has to do with flexibility & reuse). In that scenario, a read() call to a given register will utilize bus2reg() in order to convert the generic register access into a protocol-specific bus transaction which is issued via the associated sequencer/driver. When the actual operation is seen by the associated monitor component, it emits a transaction on its analysis port which is connected to the RAL, triggering a call to reg2bus() in order to figure out what happened and update the model.

If implicit prediction is used, the model update occurs in conjunction with the creation of the transaction on the sequencer/driver (the monitor is not needed in this setup) so only bus2reg() is used.

In reply to jcraft:

In reply to Malai_21:
The adapter code is going to be invoked differently depending on how you have set up prediction. If you are using explicit prediction, both bus2reg() and reg2bus() will be called at some point but if you are using implicit prediction only bus2reg() will be called.
Explicit prediction is recommended (see VA articles on the register model to understand why but it has to do with flexibility & reuse). In that scenario, a read() call to a given register will utilize bus2reg() in order to convert the generic register access into a protocol-specific bus transaction which is issued via the associated sequencer/driver. When the actual operation is seen by the associated monitor component, it emits a transaction on its analysis port which is connected to the RAL, triggering a call to reg2bus() in order to figure out what happened and update the model.
If implicit prediction is used, the model update occurs in conjunction with the creation of the transaction on the sequencer/driver (the monitor is not needed in this setup) so only bus2reg() is used.

Hi,
Thanks for the response. I read something like, “bus2reg()” is used to convert bus transactions to register items and “reg2bus” is used to convert register access to bus transactions.(Link:- Register Layer Adapter | UVM Cookbook)

what happens if implicit prediction is used? In sequences, the read method is called, adaptor converts register to bus transactions. Then the transaction is sent to DUT and DUT is sending read data. Here there is no monitor to update the transaction. Then, How read data is updated in sequences?

In reply to Malai_21:

As you state, with implicit prediction there is no monitor connection. The read() operation still invokes a bus2reg() operation to produce the actual protocol transaction but it will also check/update the mirrored value in the RAL itself at the same point (in zero simulation time). In other words, with implicit prediction the RAL relies on the read() task itself to update everything.