RAL :: RAL operation using address

UVM
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1

Hi,

As per my understanding RAL will take care address mapping internally. when we call write() or read() method of my reg class, it will further call do_bus_write or do_bus_read method of uvm_reg_map and map will start the sequence on assigned sequencer after the reg2bus or bus2reg operations.
This above operations are performed well and i am able to access my registers. but now i want to access without reg class. i want to do write and read operation based on address. does RAL have support to perform write/read operation based on address?

Thanks and Regards,
Mitesh Patel

2

In reply to mitesh.patel:

Because register addresses are alway changing during the design process. the UVM RAL provides you with a mechanism to access registers by name and not by address. This is a benefit.

If you want to access registers by address you can write your own access methods.

3

In reply to chr_sue:

Hi chr_sue,

Thanks for the response. I got your point that for address based read write operation I need to drive directly on RTL interface and define own access method. But as you mentioned that, RAL addresses are changing during simulations. How can it is possible? Can you please elaborate more?

Thanks in advance.

4

In reply to mitesh.patel:

I did not say that addresses are changing during SIMULATION. I said they are changing during the DESIGN process.

5

In reply to chr_sue:

Oh okay my mistake. I misunderstood.

Thank you for responses.