Hi, looking for some clarification.
The SystemVerilog perfomance guidelines in the UVM cookbook provide a couple of tips on constraints/randomization here SV/PerformanceGuidelines | Verification Academy
The high performance code fragment overrides pre_randomize() to generate data_array if the video_frame_item is a live_frame. The summary bullets mention that “In the first example, the content of the data array is calculated by the constraint solver inside a foreach() loop. This is unnecessary and is expensive for larger arrays. Since these values are within a predictable range they can be generated in the post_randomize() method.”
My understanding is that at the time that pre_randomize is called, live_freeze has yet to be randomized to live or freeze. Because of this and the summary bullet as a hint, does the code fragment have a typo? Should it really be post_randomize() that is being overridden? I also noticed that live_freeze is being declared rand, but also given an initial value. Would that mean that if it really should be pre_randomize being overridden, then the if statement would always be true…
Thanks.