In reply to soloist_huaxin:
Hi,
It can be done while using uvm_reg_frontdoor (user defined frontdoor) mechanism and using reg.set_frontdoor() function.
Here is code of uvm_reg_frontdoor:
//------------------------------------------------------------------------------
// Class: uvm_reg_frontdoor
//
// Facade class for register and memory frontdoor access.
//------------------------------------------------------------------------------
//
// User-defined frontdoor access sequence
//
// Base class for user-defined access to register and memory reads and writes
// through a physical interface.
//
// By default, different registers and memories are mapped to different
// addresses in the address space and are accessed via those exclusively
// through physical addresses.
//
// The frontdoor allows access using a non-linear and/or non-mapped mechanism.
// Users can extend this class to provide the physical access to these registers.
//
virtual class uvm_reg_frontdoor extends uvm_reg_sequence #(uvm_sequence #(uvm_sequence_item));
// Variable: rw_info
//
// Holds information about the register being read or written
//
uvm_reg_item rw_info;
// Variable: sequencer
//
// Sequencer executing the operation
//
uvm_sequencer_base sequencer;
// Function: new
//
// Constructor, new object given optional ~name~.
//
function new(string name="");
super.new(name);
endfunction
string fname;
int lineno;
endclass: uvm_reg_frontdoorExtend this class and make your own 2 frontdoor class
class my_fd_1 extends uvm_reg_frontdoor;
function new (string name = "my_fd_1");
super.new(name);
endfunction : new
`uvm_object_utils(my_fd_1)
endclass : my_fd_1Same way to my_fd_2 and instantiate those in your environment , then assign respective sequencer and adapter to these frontdoors.
In ENV:
class env extends uvm_env;
//-- variable declarations
my_fd_1 fd1; // user defined frontdoor mechanism
my_fd_2 fd2;
// adapter
my_adapter_1 adptr1;
my_adapter_2 adptr2;
// agent
my_agent1 agent1;
my_agent2 agent2;
//---
function void build_phase (uvm_phase phase);
// agent and adapter creation
fd1 = my_fd_1 :: type_id :: create("fd1",this);
fd1 = my_fd_2 :: type_id :: create("fd2",this);
// assign adapter to frontdoor
fd1.adapter = adptr1;
fd2.adapter = adptr2;
endfunction : build_phase
// connect phase
function void connect_phase (uvm_phase phase);
// assign respective seqrs
fd1.sequencer = agent1.seqr;
fd2.sequencer = agent2.seqr;
endfunction : connect_phase
endclass : envNow, How to initiate register read and write request by using frontdoor
If you want to generate physical request through agent1.seqr then use fd1 frontdoor mechanism by putting below code before write/read task of register in sequence.
//sequence task of register write
task reg_write();
// ----
// set frontdoor for below write request
reg.set_frontdoor( .ftdr(p_sequencer.env.fd1) // set frontdoor fd1
.map(reg_model.reg_map)); // your single register map
reg.write(//--);
endtask : reg_writesame way for read operation.
Let me know if have any confusion.