Hi,
I’m using 2 AXI VIP instances, one is configured as master and another as slave.
I’m getting the transaction from VIP ports to my monitors as below :
MASTER VIP PORT TO MASTER_MONITOR :
connection :
master_axi_user_env.axi_sys_env.master[0].monitor.item_observed_port.connect(mstr_axi_mon.mstr_axi_fifo.analysis_export);
monitor code :
class master_axi_mon extends uvm_monitor;
uvm_analysis_port#(svt_axi_transaction) mstrmon2scb_port;
uvm_tlm_analysis_fifo #(svt_axi_transaction) mstr_axi_fifo;
.
.
task run_phase(uvm_phase phase);
svt_axi_transaction txn, txn_casted;
.
.
forever begin//{
#1ns;
if (!mstr_axi_fifo.is_empty()) begin//{
mstr_axi_fifo.get(txn);
if (!$cast(txn_casted, txn.clone())) begin
`uvm_fatal(“master_axi_mon”, “Unable to $cast the received transaction to svt_axi_transaction”);
end
mstrmon2scb_port.write(txn_casted);
end//}
end//}
SLAVE VIP PORT TO SLAVE_MONITOR :
connection :
slave_axi_user_env.axi_sys_env.slave[0].monitor.item_observed_port.connect(slv_axi_mon.slv_axi_fifo.analysis_export);
monitor code :
class slave_axi_mon extends uvm_monitor;
uvm_analysis_port#(svt_axi_transaction) slvmon2scb_port;
uvm_tlm_analysis_fifo #(svt_axi_transaction) slv_axi_fifo;
.
.
task run_phase(uvm_phase phase);
svt_axi_transaction txn, txn_casted;
.
.
forever begin//{
#1ns;
if (!slv_axi_fifo.is_empty()) begin//{
slv_axi_fifo.get(txn);
if (!$cast(txn_casted, txn.clone())) begin
`uvm_fatal(“slave_axi_mon”, “Unable to $cast the received transaction to svt_axi_transaction”);
end
slvmon2scb_port.write(txn_casted);
end//}
end//}
SCOREBOARD CODE :
class mdfiss_axi_scb extends uvm_scoreboard;
`uvm_component_utils(mdfiss_axi_scb)
uvm_tlm_analysis_fifo #(svt_axi_transaction) slvmon2scb_axi_fifo;
uvm_tlm_analysis_fifo #(svt_axi_transaction) mstrmon2scb_axi_fifo;
.
.
.
task run_phase(uvm_phase phase);
svt_axi_transaction mstr_txn;
svt_axi_transaction slv_txn
svt_axi_transaction slv_txn_que[$];
svt_axi_transaction slv_txn_l;
.
.
fork
begin//{
forever begin//{
#1ns;
if (!slvmon2scb_axi_fifo.is_empty()) begin//{
slvmon2scb_axi_fifo.get(slv_txn);
slv_txn_que.push_back(slv_txn);
end//}
end//}
end//}
begin//{
forever begin//{
#1ns;
if (!mstrmon2scb_axi_fifo.is_empty()) begin//{
#1ns;
mstrmon2scb_axi_fifo.get(mstr_txn);
if (slv_txn_que[0].size()!=0) begin//{
slv_txn_l=slv_txn_que.pop_front();
slv_txn_l.compare(mstr_txn);
end//}
else begin//{
`uvm_error("mdfiss_axi_scb","slv txn not found, only mstr txn received")
end//}
end//}
end//}
end//}
join
MY CONCERN is :
compare method (in scoreboard : slv_txn_l.compare(mstr_txn);) for comparing the transactions received from both monitors is not working as expected.
Even though if I corrupt wdata or any other axi signal before reaching slave, compare method is not flagging them as error.
I’m just getting Miscompares like below. :
UVM_INFO:/nfs/site/disks/alr_mfr_001/csg/mdfiss_nov30/subip/vip/uvm/src/base/uvm_comparer.svh(351) @ 1529000000: reporter [MISCMP] Miscompare for curr_write_addr_xact: lhs type = “svt_axi_slave_transaction” : rhs type = “svt_axi_master_transaction”
UVM_INFO:/nfs/site/disks/alr_mfr_001/csg/mdfiss_nov30/subip/vip/uvm/src/base/uvm_comparer.svh(351) @ 1529000000: reporter [MISCMP] Miscompare for curr_write_addr_xact.svt_accept_realtime: lhs = 1.52562e+06 : rhs = 1.525e+06
UVM_INFO:/nfs/site/disks/alr_mfr_001/csg/mdfiss_nov30/subip/vip/uvm/src/base/uvm_comparer.svh(351) @ 1529000000: reporter [MISCMP] Miscompare for curr_write_addr_xact.wvalid_delay[0]: lhs = 'h0 : rhs = 'h1
UVM_INFO:/nfs/site/disks/alr_mfr_001/csg/mdfiss_nov30/subip/vip/uvm/src/base/uvm_comparer.svh(351) @ 1529000000: reporter [MISCMP] Miscompare for curr_write_addr_xact.is_mem_update_pre_xact_xmit_check_done: lhs = 'b0 : rhs = 'b1
UVM_INFO:/nfs/site/disks/alr_mfr_001/csg/mdfiss_nov30/subip/vip/uvm/src/base/uvm_comparer.svh(351) @ 1529000000: reporter [MISCMP] Miscompare for curr_write_addr_xact.rvalid_delay.size(): lhs = 1 : rhs = 0
UVM_INFO:/nfs/site/disks/alr_mfr_001/csg/mdfiss_nov30/subip/vip/uvm/src/base/uvm_comparer.svh(351) @ 1529000000: reporter [MISCMP] Miscompare for curr_write_addr_xact.reference_event_for_first_rvalid_delay: lhs = “READ_ADDR_VALID” : rhs = “READ_ADDR_HANDSHAKE”
UVM_INFO:/nfs/site/disks/alr_mfr_001/csg/mdfiss_nov30/subip/vip/uvm/src/base/uvm_comparer.svh(351) @ 1529000000: reporter [MISCMP] Miscompare for curr_write_addr_xact.reordering_priority: lhs = 'h8 : rhs = 'h1
UVM_INFO:/nfs/site/disks/alr_mfr_001/csg/mdfiss_nov30/subip/vip/uvm/src/base/uvm_comparer.svh(351) @ 1529000000: reporter [MISCMP] Miscompare for curr_write_addr_xact.check_addr_overlap: lhs = 'b1 : rhs = 'b0
UVM_INFO:/nfs/site/disks/alr_mfr_001/csg/mdfiss_nov30/subip/vip/uvm/src/base/uvm_comparer.svh(351) @ 1529000000: reporter [MISCMP] Miscompare for curr_write_addr_xact.xact_consumed_by_driver_time: lhs = 1.52562e+06 : rhs = 1.525e+06 UVM_INFO:/nfs/site/disks/alr_mfr_001/csg/mdfiss_nov30/subip/vip/uvm/src/base/uvm_comparer.svh(351) @ 1529000000: reporter [MISCMP] Miscompare for curr_write_addr_xact.xact_consumed_time_to_begin_time_delay: lhs = 1.52562e+06 : rhs = 625 UVM_INFO:/nfs/site/disks/alr_mfr_001/csg/mdfiss_nov30/subip/vip/uvm/src/base/uvm_comparer.svh(382) @ 1529000000: reporter [MISCMP] 15 Miscompare(s) (10 shown) for object write_tran@269552 vs. curr_write_addr_xact@269542
How can I solve this issue ?
Please respond back as early as possible as I’m struck in this while project schedule is critical.
Thanks,
Chandrashekar