Multiple write method in uvm_reg_sequence for accessing mutiple registers

UVM
,
1

Hello,

I am new to uvm_ral and i am having a ral model in which i want to access multiple write method for multiple register in a single ral_sequence body task.
For better understanding, sharing bit of a code,

task reg_addr_sequence :: body();

uvm_status_e status;

reg_block.addr_reg.write(status, 8’d89);
reg_block.clk_low_reg.write(status,9000);
reg_block.clk_high_reg.write(status,5600);

endtask

Hoping for your guidance,
Thank you in advance.
Dhruvesh.b

2

In reply to Dhruvesh.b:

Hello,
I am new to uvm_ral and i am having a ral model in which i want to access multiple write method for multiple register in a single ral_sequence body task.
For better understanding, sharing bit of a code,
task reg_addr_sequence :: body();
uvm_status_e status;
reg_block.addr_reg.write(status, 8’d89);
reg_block.clk_low_reg.write(status,9000);
reg_block.clk_high_reg.write(status,5600);
endtask
Hoping for your guidance,
Thank you in advance.
Dhruvesh.b

In this sequence i am facing an issue in adapter reg2bus method,as uvm_reg_bus_op is having only one data i.e rw.data, so data will have one value out of this three (89,9000,5600),in my case (rw.data == 9000),
So what is the correct approach to resolve this situation.

Thank you.
Dhruvesh.b

3

In reply to Dhruvesh.b:

Looks like soemthing is wrong with your reg2bus adapter. You can execute only 1 write at the same time. Your sequence is exactly doing this. First you are writing d’89, netx is 9000 (which format is this?) and the last write is 5600 (which format?). You’ll see all the 3 values in the reg2bus in thes ame order as you are doing the writes.

4

In reply to chr_sue:

Hello @chr_sue,

Thank you for your feedback.
→ 9000 and 5600 are decimal formats.

  • So,my reg2bus adapter is having (uvm_reg_bus_op rw) as an argument,in which rw.data will have which value at a time,as in my case rw.data is having d’9000 at all the time,i don’t know why.
    For better explanation providing the code.
function uvm_sequence_item transmitter_adapter :: reg2bus( const ref uvm_reg_bus_op rw );
  
 transmitter_sequence_item seq_adapter;
 seq_adapter = transmitter_sequence_item::type_id::create("seq_adapter");
 
  if ( rw.kind == UVM_READ )       seq_adapter.rw = read;
  else if ( rw.kind == UVM_WRITE ) seq_adapter.rw = write;
      
  if ( rw.kind == UVM_WRITE )
    begin
``` verilog

      seq_adapter.slave_addr = rw.data;
      seq_adapter.toggling_rate_low_state = rw.data;
      seq_adapter.toggling_rate_high_state = rw.data;
      $display ("rw.data == %0d",rw.data);
    end
  return seq_adapter;
  
endfunction: reg2bus

So, rw.data in this case is always taking d’9000,
I want,
seq_adpater_slave_addr = rw.data (here rw.data == d’89)
seq.adapter.toggling_rate_low_state = rw.data (here rw.data == d’9000)
seq.adapter.toggling_rate_high_state = rw.data (here rw.data == d’5600)

Is this not possible, or i am doing logical mistake in adpater reg2bus method.

Waiting for your Response,
Thank you,
Dhruvesh.b

5

In reply to Dhruvesh.b:

Without seeing more code it is impossible to give you an advice.

3 questions/remarks:
(1) seq_adapter.slave_addr = rw.data; // Is this correct?
(2) seq_adapter.toggling_rate_low_state = rw.data;
seq_adapter.toggling_rate_high_state = rw.data; // What is the toggling rate
(3) Never use $display in a UVM testbenh

6

In reply to chr_sue:

Thank you, for your remarks.

  1. seq_adpater.slave_addr = rw.data (This is correct as i want slave_addr to be d’89).
  2. Toggling_rate is a used to control low_level and high_level of scl in i2c.
  3. Yes,i just used $display to quick check the value of rw.data.
7

In reply to Dhruvesh.b:

Thanks for the details.
You’ll never replace the $display in the future and the uvm_info is not more complicated.
From your explanations I get now a complete different impression. You do 3 write commands tgo complete 1 bus command. Right?
Whay do you not use the addr field in the rw. To specify your address. And you could put together all 2 values in 1 write command.

8

In reply to chr_sue:

Thanks for the remarks and your time,
I think i can go with the approach you just told.

Once again,
Thank you.
Dhruvesh.b