Hi,
I am doing a scenario which has two DUTS of same ports but with different names,so here i am instantiating the same agent twice and trying to set_config object of the two instances of virtual interface but it is throwing build error to unable to find the virtual in the driver?
what could be the potential cause?
please find the code::
// create S2P Bus interface container class handle
//s2p_vif_container_h = new();
s2p2_hvl_if = new(“test_bench.dut.s2p2_if_inst”);
s2p2_vif_container_h = s2p2_vif_container_t::type_id::create( “s2p2_vif_container_h” );
s2p2_vif_container_h.m_vif_h = test_bench.dut.s2p2_if_inst;
set_config_object(“*m_s2p2_agent_h.m_s2p2_driver_h”, “s2p2_vif_container_h”, s2p2_vif_container_h, 0);
// create S2P Bus interface container class handle
//s2p_vif_container_h = new();
s2p2_sw2_hvl_if = new(“test_bench.dut.s2p2_if_inst1”);
s2p2_sw2_vif_container_h = s2p2_sw2_vif_container_t::type_id::create( “s2p2_sw2_vif_container_h” );
s2p2_sw2_vif_container_h.m_vif_h = test_bench.dut.s2p2_if_inst1;
set_config_object(“*m_s2p2_sw2_agent_h.m_s2p2_driver_h”, “s2p2_sw2_vif_container_h”, s2p2_sw2_vif_container_h, 0);
Drver Code ifdef S2P2_TOP typedef uvm_vif_container #(virtual s2p2_if) s2p2_vif_container_t; else
typedef uvm_vif_container #(virtual s2p2_if) s2p2_sw2_vif_container_t;
`endif
ifdef S2P2_TOP if(!get_config_object("s2p2_vif_container_h", dummy, 0)) begin uvm_report_error("build", "no virtual interface available"); end else begin if(!$cast(s2p2_vif_container_h, dummy)) begin uvm_report_error("build", "virtual interface is incorrect type"); end else begin s2p2_virtual_vif_h = s2p2_vif_container_h.m_vif_h; end end else
if(!get_config_object(“s2p2_sw2_vif_container_h”, dummy, 0)) begin
uvm_report_error(“build”, “no virtual interface available”);
end
else begin
if(!$cast(s2p2_sw2_vif_container_h, dummy)) begin
uvm_report_error(“build”, “virtual interface is incorrect type”);
end
else begin
s2p2_virtual_vif_h = s2p2_sw2_vif_container_h.m_vif_h;
end
end
`endif
Please let me know ASAP.
Thanks
Syed Taahir
It looks like quite complicated what you are doing here. Why do you not follow the instructions for connecting the DUT with the UVM testbench given in the UVM User Guide?
OK, I’ll try to explain in some more details. We are using the virtual interface approach in the class-based part of the testbench, i.e. we are declaring a so-called virtual interface by preceding the type of the corresponding SV interface with the keyword virtual.
See the code example:
//-----------------------------------------------------------------------------
class spi_driver extends uvm_driver #(spi_seq_item);
//-----------------------------------------------------------------------------
extern function new(string name = “spi_driver”, uvm_component parent = null);
extern function void connect_phase(uvm_phase phase);
extern task run_phase(uvm_phase phase);
extern function void report_phase(uvm_phase phase);
endclass : spi_driver
From the toplevel module of the verification environmet we are passing the interface by using the uvm_config_db to the class-based TB. See the code here:
module example_top_tb;
//-----------------------------------------------------------------------------
import uvm_pkg::*;
`include “uvm_macros.svh”
import example_top_test_pkg::*;
//instantiate UVC interfaces
spi_if spi_if_i();
//instantiate and connect dut to interface(s) here