Mirror Value is not going to update

UVM
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1

Hi All,

I am struct at one place. I am trying to implement RAL environment. I don’t have much knowledge of RAL. I am getting below error:-

UVM_ERROR /proj/eda/cadence/incisive/151/15.10.011/tools.lnx86/methodology/UVM/CDNS-1.1d/sv/src/reg/uvm_reg.svh(2892) @ 299616000203fs: reporter [RegModel] Register “fpgadp_regs.DP_DMA_HOST_CTL1” value read from DUT (0x0000000080004000) does not match mirrored value (0x00000000c0004000)

UVM_INFO /proj/eda/cadence/incisive/151/15.10.011/tools.lnx86/methodology/UVM/CDNS-1.1d/sv/src/reg/uvm_reg.svh(2911) @ 299616000203fs: reporter [RegModel] Field done (fpgadp_regs.DP_DMA_HOST_CTL1[30:30]) mismatch read=1’h0 mirrored=1’h1

UVM_INFO @ 299616000203fs: reporter [RegModel] Read register via map fpgadp_regs.FPGA_PCIE_MAP_DP: fpgadp_regs.DP_DMA_HOST_CTL1=80004000

Here Mirror value (register value inside the RAL model) is not going to update after reading from DUT.

So, What could be the problem?? Please guide me.

Thanks
KAPIL

2

In reply to kapil khare:

You should look to the UVM User Manual. Before reading you have to perform an mirror command. This reads the DUT reg and updates the mirror reg if this is needed.

3

In reply to chr_sue:

Thanks for reply.

Can you tell me best way to learn RAL easily?

4

In reply to kapil khare:

It might not be really easy to learn UVM RAL. Best is always a high quality training course.
I’m recommending the UVM Cookbook you can find here in the Verification Academy and the corresponding code examples. Another source is Doulos KnowHow.