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  • MIPI DSI QUESTA Verification IP configuration

MIPI DSI QUESTA Verification IP configuration

UVM 6661
MIPI DSI 1
jx000
jx000
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1 post
March 17, 2023 at 11:05 am

I am looking to use MIPI DSI VIP and its built-in sequences for my UVM test. The IP shows built-in vertical sequences (VACT,VBP,VFP,VSA). Are there configurable parameters (such as HSA, HBP, HFP) within these vertical sequences?

Also, How to make Questa DSI VIP start the clock lane in LP11 before going into HS mode?
Currently simulation shows LP00 at start up and go straight to differential mode.

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dave_59
dave_59
Forum Moderator
10662 posts
March 17, 2023 at 8:50 pm

In reply to jx000:

Welcome to the Verification Academy.

This Mentor/Siemens EDA sponsored public forum is not for discussing tool specific usage or issues. Please read your tool's user manual or contact your tool vendor directly for support. 

— Dave Rich, Verification Architect, Siemens EDA

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