Memory model - looking for example or shared code

UVM
,
1

Hi VA,

Verifying a cache memory block.

Looking for shared code to represent the cache memory model in the testbench.
Desired it should have functionalities like:

  1. Create a memory model with number of lines X, and width of line W.
  2. Init the memory data with values:
    2.1 Random
    2.2 all ones
    2.3 all zeros
    2.4 address value
  3. Write/Read API functions, in byte resolution, line resolution.

Is there any Github shared code you are familiar with?
Maybe the uvm_mem construct can help me with this? Don’t know if yes, will be happy to hear your advices.

Thanks,
Michael

2

In reply to Michael54:

Hi Michael, this might be a starting point:

3

In reply to chr_sue:

Christoph Thank you! :)
Will go over the code example.