I am trying to measure the performance of a SDRAM memory controller in systemverilog uvm. I tried to read online articles, but couldn’t find anything helpful. Any idea what will be the performance metrics and what test scenarios needs to be covered.
I am trying to measure the performance of a SDRAM memory controller in systemverilog uvm. I tried to read online articles, but couldn’t find anything helpful. Any idea what will be the performance metrics and what test scenarios needs to be covered.