Is it possible to interchange the port & export connection between sequencer and driver?

UVM
1

Hi all,

I have got an interview question regarding port and export. Can we interchange the port and export connection between sequencer and driver.

Usual connection : driver.seq_item_port.connect(sequencer.seq_item_export)

can we make like this : sequencer.seq_item_port.connect(driver.seq_item_export).

If yes, please share related example and some description regarding that.
If No, What is reason and why is not possible.

Thanks & Regards
Vk_18

2

In reply to VK_18:

You can change the direction, but you have to use the uvm_push_sequencer and uvm_push_driver base classes instead of uvm_sequencer/uvm_driver.

3

In reply to chr_sue:

In reply to VK_18:
You can change the direction, but you have to use the uvm_push_sequencer and uvm_push_driver base classes instead of uvm_sequencer/uvm_driver.

Thank you @chr_sue, can u share a simple example for better understanding.

Thanks in advance.

4

In reply to VK_18:

Please find some code snippets below:

typedef uvm_push_sequencer #(my_transaction) my_sequencer;

class my_agent extends uvm_agent;

  my_sequencer  m_sequencer;
  my_driver     m_driver;
  ...
  function void connect_phase(uvm_phase phase);
    ...
    m_sequencer.req_port.connect(m_driver.req_export);

class my_driver extends uvm_push_driver #(my_transaction);
  ...
endclass