Is it correct if the monitor/collector uses information from register bank?

UVM
1

Hi

So,first I am learning uvm. The partitioning of what should be checked at transaction level or signal level is not always obvious to me.
I have seen monitor instantiating handle to register model.By monitor I mean the component transforming signal into transaction sent to the scoreboard.
Is it correct if this component used information from register bank ?

For example, we can consider the case of UVC of serial interface slave. To check if the slave should reply or not to the master request, it is needed to know the value of the register slave id/address.
1)if the monitor has access to the register value, the monitor can do the check. if the serial interface support arbitration process, the monitor can also check the bus arbitration process.

2)if the monitor does not have access to this register value, it should report more info in the transaction,so the scoreboard can check if the slave should reply or not.
The monitor should also sent all information needed to check bus arbitration.

What is the correct method ?

Thanks
Mafate

2

In reply to mafate974:

In contrast to the eRM/Specman methodology there are no restrictions how to implement the monitor.
In the UVM I see 2 different approaches for the monitor:
(1) the monitor is a stupid component extracting simply data without special investigations.
(2) the monitor extracts data with respect to special conditions.

3

In reply to mafate974:

The basic functionality of the monitor is to convert signal activity into transactions and pass it on to the subscribers (scoreboard/coverage) for data processing checks. It is not preferred to have any checks with in monitor except for the protocol violation checks for the following reason.

If we start implementing the decision making mechanism inside the monitor, then it becomes more and more complex and we may need to end up updating the monitor for any design spec. change. Ideally, no UVM component should change through the course of verification (except when DUT I/F changes or the protocol changes); only the Scoreboard/golden model/transfer function, checkers, tests, sequences should be updated once the TB environment is stable.