Invoking a component in module

UVM
1

Hi guys, I have a requirement to invoke a common component under multiple test.
Is there a way to invoke the component phasing mechanism outside test?
For example. Let’s say I have a test my_test_1, my_test_2 … So on.
Now consider I want a component “special_component” outside of test.
Is there a way I can achieve this ?

2

In reply to Sanjay$6$7:

Yes, as long as you create the component at time 0. See UVM component hierarchy and phase ordering - EDA Playground

3

In reply to dave_59:

Hey Dave, thanks. this helps a-lot.

4

In reply to Sanjay$6$7:

Also I would like to know, if there is a possibility to get the current phase the UVM_TB is in from top module.
For eg : Let say I want to know when the ENV is reaching the connect_phase.