Interface connection

I create interface in my tb spy_if_inst to spy on internal signal.
tb code:

module hdl_top_tb;
    import uvm_pkg::*;
    import top_tb_params_pkg::*;
   
    dragon_top_sim dragon_top
    (
....
); 

    default_clk_gen default_clk_gen
    (
        .CLK(default_clk_gen_CLK)
    );
    default_reset_gen default_reset_gen
    (
        .RESET(default_reset_gen_RESET),
        .CLK_IN(default_clk_gen_CLK)
    );
   
 spy_if spy_if_inst();
 
 assign spy_if_inst.done = dragon_top.dragon_design_i.cu_top0_i.cuc_done;
    
    initial

    begin     
    	
     $display("[hdl]done %b:",spy_if_inst.done);
      uvm_config_db #(virtual spy_if )::set( null , "*" ,"spy_if_inst", spy_if_inst);
end
   
endmodule: hdl_top_tb
interface spy_if;
    	logic done;
    	logic busy;
    
    endinterface 

i try to use in this interface in component


class generator extends uvm_component;
virtual spy_if spy_if_inst;
   `uvm_component_utils(generator)
	function new(string name = "generator", uvm_component parent = null);
		super.new(name, parent);
       
	endfunction	

 if(spy_if_inst != null)begin
 	spy_if_inst.done = 1;
 	$display("done %b:",spy_if_inst.done);  
@(posedge spy_if_inst.done)begin
	$display("done %b:",spy_if_inst.done);

//// Build Function
function void build_phase (uvm_phase phase);
	super.build_phase(phase);
	if(!uvm_config_db #(virtual spy_if)::get(this, "", "spy_if_inst",this.spy_if_inst))
		`uvm_fatal("FATAL MSG", "Configuration Object Not Received Properly");
endfunction

endclass

the connection dont work spy_if_inst is null!
what worng?

In reply to TamarB:

Please explain “dont work”. Does not compile? uvm_config_db returns true, but this.spy_if_inst is still null?

Where is this code?

 if(spy_if_inst != null)begin
 	spy_if_inst.done = 1;
 	$display("done %b:",spy_if_inst.done);  
@(posedge spy_if_inst.done)begin
	$display("done %b:",spy_if_inst.done);

In reply to dave_59:

the code is in func run()
uvm_config_db returns true, but this.spy_if_inst is still null

I try to retrieve an instance of the spy_if interface from the configuration database.
The variable found =1
This means that the get function is successful
But the spy_if_inst is still null
What missing in the code?

function void generator::build_phase (uvm_phase phase);
	super.build_phase(phase);
	$display("Before get(): spy_if_inst = %p", spy_if_inst);
	found = uvm_config_db#(virtual spy_if)::get(null, "", "spy_if_inst", spy_if_inst);
	$display("After get(): spy_if_inst = %p", spy_if_inst);
$display("found %b:",found);  
endfunction

In reply to TamarB:
Are you sure you only have one declaration of spy_if_inst in you generator, and non inside your run method?

In reply to TamarB:

I try to retrieve an instance of the spy_if interface from the configuration database.
The variable found =1
This means that the get function is successful
But the spy_if_inst is still null
What missing in the code?

function void generator::build_phase (uvm_phase phase);
super.build_phase(phase);
$display("Before get(): spy_if_inst = %p", spy_if_inst);
found = uvm_config_db#(virtual spy_if)::get(null, "", "spy_if_inst", spy_if_inst);
$display("After get(): spy_if_inst = %p", spy_if_inst);
$display("found %b:",found);  
endfunction

Your get call should be

found = uvm_config_db#(virtual spy_if)::get(this, "", "spy_if_inst", spy_if_inst);

@dave_59
Yes I’m sure

@chr_sue
found = uvm_config_db#(virtual spy_if)::get(this, “”, “spy_if_inst”, spy_if_inst);
Still the object remains null

Maybe the connection between top and generator is wrong??

In reply to TamarB:

Could you please use the simulator switch
+UVM_CONFIG_DB_TRACE
to trace the usage of the config_db.

What does this information give me and where?

In reply to TamarB:

It reports you the uvm_config_db entries.
But I believe we are hunting in the wrong place for a non-existing error.
Please ignore the error message from the build_phase and try if you see the virtual interface in the run_phase. It shoule be there.
I was execising one of my basic examples and found the same rror as you did. But I see the virtual interface when running the simulation.

i try to use in run_phase
but i get error
** Fatal: (SIGSEGV) Bad handle or reference.
on this line
@(posedge spy_if_inst.done)begin
$display(“done %b:”,spy_if_inst.done);
while( read_queue.num()>0)begin
read_queue.get(trans);
trans.is_write=0;

trans_queue.put(trans);
end

In reply to TamarB:

OK, the virtual interface does not exist.
But it’s guessing what we are doing.
Can you share your testbench code personally?

Yes
If it could help me

In reply to TamarB:

If think so.
I could have a look tomorrow to your code.
Please send a tar-file to
christoph@christoph-suehnel.de