In i2c arbitration, why slave_seq will not sample the address?

UVM
1

///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
//---------------------- Arbitration Sample Seqs---------------------------------------------------------------------------
//////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
class I2C_M_sample_seq_1 extends I2C_M_base_sequence;

`uvm_object_utils(I2C_M_sample_seq_1)

I2C_M_trans trans_h;
 parameter delay = 5;

function new (string name = “I2C_M_sample_seq_1”);
super.new(name);
endfunction

task body();
repeat(1) begin

		trans_h = I2C_M_trans::type_id::create("trans_h");
		
	   	start_item(trans_h);
	    `uvm_info(get_name(), "start_item_M_1:::IDLE", UVM_LOW) 
			
		assert(trans_h.randomize() with {call_drive_function == IDLE;}); // 0 = write a data
		//`uvm_info(get_name(), "randomize_M_sample_seq_1", UVM_LOW)
		
		finish_item(trans_h);
		`uvm_info(get_name(),"finish_item_M_1:::IDLE",UVM_LOW)

Delay;

 		start_item(trans_h);
	    `uvm_info(get_name(), "start_item_M_1:::START", UVM_LOW) 
      	
		assert(trans_h.randomize() with {call_drive_function == start;}); // 0 = write a data
		//`uvm_info(get_name(), "randomize_M_sample_seq_1", UVM_LOW)
		
		finish_item(trans_h);
		`uvm_info(get_name(),"finish_item_M_1:::START",UVM_LOW)
		
	end

repeat(1)
begin
start_item(trans_h);
`uvm_info(get_name(), “start_item_M_1:::START_TRANSMISSION”, UVM_LOW)

		   assert(trans_h.randomize() with {call_drive_function == start_transmission; slv_add==7'd10;  } ); // 0 = write a data
		   //`uvm_info(get_name(), "randomize_M_sample_seq_1", UVM_LOW)
		
		   finish_item(trans_h);
		   `uvm_info(get_name(),"finish_item_M_1:::START_TRANSMISSION",UVM_LOW)
		
	   end
	
//#delay;

endtask: body

endclass

///////////////////////////////////////////////////

class I2C_M_sample_seq_2 extends I2C_M_base_sequence;

`uvm_object_utils(I2C_M_sample_seq_2)

I2C_M_trans trans_h;
 parameter delay = 5;

function new (string name = “I2C_M_sample_seq_2”);
super.new(name);
endfunction

task body();
repeat(1) begin

		trans_h = I2C_M_trans::type_id::create("trans_h");
		
	   	start_item(trans_h);
	    `uvm_info(get_name(), "start_item_M_2:::IDLE", UVM_LOW) 
			
		assert(trans_h.randomize() with {call_drive_function == IDLE;}); // 0 = write a data
		//`uvm_info(get_name(), "randomize_M_sample_seq_2", UVM_LOW)
		
		finish_item(trans_h);
		`uvm_info(get_name(),"finish_item_M_2:::IDLE",UVM_LOW)
#delay;
        
 		start_item(trans_h);
	    `uvm_info(get_name(), "start_item_M_2:::START", UVM_LOW) 
      	
		assert(trans_h.randomize() with {call_drive_function == start;} ); // 0 = write a data
		//`uvm_info(get_name(), "randomize_M_sample_seq_2", UVM_LOW)
		
		finish_item(trans_h);
		`uvm_info(get_name(),"finish_item_M_2:::START",UVM_LOW)
		
	end

repeat(1)
begin
start_item(trans_h);
`uvm_info(get_name(), “start_item_M_2:::START_TRANSMISSION”, UVM_LOW)

		   assert(trans_h.randomize() with {call_drive_function == start_transmission; slv_add==7'd10; } ); // 0 = write a data
		   //`uvm_info(get_name(), "randomize_M_sample_seq_2", UVM_LOW)
		
		   finish_item(trans_h);
		   `uvm_info(get_name(),"finish_item_M_2:::START_TRANSMISSION",UVM_LOW)
		
	   end

endtask: body
endclass

2

In reply to Brinda Rathod:

Looks like you are showing only master sequences. Where is the slave and how is it connected. The slave shoud respond an a slave command.