I want to write an assertion for checking that the data stable for 16 clock cycles and continue the checking for the next 16 cycles and so on.?How can i write this?

UVM
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1

Hi, i am very much new to the topic and need help in understanding

I am writing an assertion where as long as tx_frame is high, it should check the data stable for 16 cycles.

i wrote something like this, but its not happening as needed.

a1: assert property (@(posedge tx_bclk) frame_check)

property framecheck
disable iff(rst || !tx_frame)
tx_frame |=> ($stable(uart_txd_o)[*16]);
endproperty

[waveform added]

2

In reply to adharshh:

This is what your assertion is doing. But uart_txd_o is not stable for 16 clock cycles. The red mark is showing you the 16.

3

In reply to chr_sue:

My data is there for 16 cycles, but the checking somehow is starting one cycle after.

Is there any other way, instead of using $stable, to check the data stability?

4

In reply to adharshh:
You can use the local variable. $stable checkes previoud and current value to assure the data has not canged.


I belived when the tx_frame is high, the data will be available on uart_txd_o;

a1: assert property (@(posedge tx_bclk) frame_check)

property framecheck
int local_data ;
disable iff(rst || !tx_frame)
(tx_frame, local_data = uart_txd_0) |-> (local_data == uart_txd_o)[*16]);
endproperty
5

In reply to adharshh:

In reply to chr_sue:
My data is there for 16 cycles, but the checking somehow is starting one cycle after.
Is there any other way, instead of using $stable, to check the data stability?

You are using the non-overlapping implication operator which delays the counting by 1 clock cycle. That’s correct.

6

In reply to chr_sue:

How about this one, its seems working.

a1: assert property (@(posedge tx_bclk) frame_check)

property framecheck
int local_data ;
disable iff(!rst || !tx_frame)
(tx_frame, local_data = uart_txd_0) |=> (local_data == uart_txd_o)[=15]);
endproperty.

This property, take the txd_o value in the 1st baud clock and check it with the rest (with next 15 cycles) and so on.

7

In reply to adharshh:

There are always aeveral solutions. This should also work:

property framecheck
  disable iff(rst || !tx_frame)
  tx_frame |-> ($stable(uart_txd_o)[*16]);
endproperty

I’m useing the overlapping implication operator. It starts counting when tx_frame is 1’b1.

8

In reply to chr_sue:

I am not sure why, but the above one is not working.

when i give non_overlapping implication/ overlapping implication operator with $stable i am getting error one cycle after the toggles.

9

You will have to add a term to the antecedent on every change of uart_tx_o, otherwise your assertion would fire a cycle after every change of uart_txt_o

Try this:

property framecheck
  disable iff(rst || !tx_frame)
  tx_frame && $change(uart_txd_o) ||-> ($stable(uart_txd_o)[*15]);
endproperty
10

In reply to adharshh:

In reply to chr_sue:
How about this one, its seems working.
a1: assert property (@(posedge tx_bclk) frame_check)
property framecheck
int local_data ;
disable iff(!rst || !tx_frame)
(tx_frame, local_data = uart_txd_0) |=> (local_data == uart_txd_o)[=15]);
endproperty.
This property, take the txd_o value in the 1st baud clock and check it with the rest (with next 15 cycles) and so on.

Not sure why you have used “[=15]” operator here. That is non-contiguous. From your waveform, you want to check the stability on 16 consecutive clock ticks right?

11

In reply to ledzep_1988:

Uart data bit may or maynot change after 16 baud cycles. i dont think the above assertion could meet the requirement. Thankyou.