HVL path of uvm_reg for reg.write construction in function

I am trying to create a function in order to find the ral path instead every user trying to remember or type the big ral path
i.e
find_ral_path_reg(input string block, input string reg_name);

Typical path of a reg of specific block is the below
m_tb_env.m_Ral2.ial_tc_bbs.DVSEC_FBRANGE1HIGH where the DVSEC_FBRANGE1HIGH is the register

If I create a uvm_reg var i.e csr_name and I assign the full above path the

m_tb_env.m_Ral2.ial_tc_bbs.DVSEC_FBRANGE1HIGH where the DVSEC_FBRANGE1HIGH.write works. I do see the handler being retrieved

Now I will try to find the handler using the find_ral_path_reg based on the two input arguments
Inside the code I have

csr_name = m_tb_env.m_Ral2.ial_tc_bbs.BBS_PATH(reg_name) The macro is defined as define BBS_PATH(reg) reg
It seems the reg_name can not be evaluated just before the macro as DVSEC_FBRANGE1HIGH
so I am getting the reg_name

Is there a way to evaluate the register name from the input function during the macro call?

Thanks

In reply to george7272:

I am not following what your problem is, or what you are even trying to do. The macro

`define BBS_PATH(reg) reg

does not do anything. I just passes its argument as if the macro was never there. `BBS_PATH(XYZ) would just be replaced with XYZ.

Hi Dave
The issue is that the argument as you pointed out the XYZ is an argument in a function
The argument is not evaluated before it goes to the macro
Let’s call the function and the reg_name le’ts make it uvm_reg type)
uvm_reg csr;

csr=find_ral_path_reg(BBS,DVSEC_FBRANGE1HIGH);

I should get as csr the following

m_tb_env.m_Ral2.ial_tc_bbs.DVSEC_FBRANGE1HIGH where the DVSEC_FBRANGE1HIGH

If I call the functions passing a different register name i.e

csr=find_ral_path_reg(BBS,DVSEC_FBRANGE1HIGH5); I should get as csr

m_tb_env.m_Ral2.ial_tc_bbs.DVSEC_FBRANGE1HIGH5

but I am not getting that
I am always getting
m_tb_env.m_Ral2.ial_tc_bbs.reg

I am getting the name I use as an argument to the macro
Is there a way the macro argument to be evaluated to whatever is being passed in the function?

Thanks

In reply to george7272:

Macros are preprocessing text compiler directives that get expanded before any SystemVerilog code gets parsed.

What is BBS? You cannot covert a string to an identifier name.

The is a uvm_reg_block method called get_reg_by_name and get_field_by_name. Maybe that is what you really need instead of what you are trying to do.