How to use Virtual sequence containing different sequences running on different sequencers?

I have a base sequence ( sequence_my )that is extended from uvm_sequence and it has p_sequencer declaration as SEQUENCER_MY .

I have another sequence (sequence_simple) that is also extended from uvm_sequence and it has p_sequencer declaration as SEQUENCER_VIRTUAL (a virtual sequencer ).

Then I want to make a new virtual sequence (sequence_new) extended from uvm_sequence , in which I want to run the above two sequences (sequence_my on SEQUENCER_MY and sequence_simple on SEQUENCE_VIRTUAL ) and sequence_new sequence will be default sequence for SEQUENCER_VIRTUAL using config_db through top test file.


sequence_new extends uvm_sequence ;

  SEQUENCER_MY  SEQUENCER_MY_h ;
  SEQUENCER_VIRTUAL SEQUENCER_VIRTUAL_h ;

  `uvm_object_utils(sequence_new)
  
   //constructor 
     

   function new (string name = "ahb_custom_virtual_sequence");
    super.new(name);

   endfunction : new

  
  virtual task pre_body();
    super.pre_body();
    if (starting_phase!=null) begin
      starting_phase.raise_objection(this);
    end
  endtask: pre_body

 virtual task post_body();
    super.post_body();
    if (starting_phase!=null) begin
      starting_phase.drop_objection(this);
    end
  endtask: post_body

 virtual task body();
 sequence_my sequence_my_h ;
 sequence_simple sequence_simple_h ;

 sequence_my_h = sequence_my::type_id::create(sequence_my_h);
 sequence_simple_h = sequence_simple::type_id::create(sequence_simple_h);

 `uvm_do_on(sequence_my_h , SEQUENCE_MY_h);
 `uvm_d0_on(sequence_simple_h ,SEQUENCE_VIRTUAL_h);

 enctask 

endclass

Error-[NOA] Null object access
The object at dereference depth 1 is being used before it was constructed/allocated.
Please make sure that the object is allocated before using it.

So please help me to find the reason of this error and suggest right approach to solve this problem .
Thanks in advance .

Some how I think you missed the handle for the sequencer:

Set the Sequencer:

uvm_config_db #(your_sequencer_name)::set(null, *, “your_sequencer_name”, your_agent.your_sequencer)

Get the sequencer in the Sequence using it::

if(!uvm_config_db #(your_sequencer_name)::get(null, get_full_name(), “your_sequencer_name”, SEQUENCER_MY_h)) begin
`uvm_error(get_full_name(), “CONFIG_DB_ERROR : YOUR SEQUENCER NOT FOUND not found”)
end

You need to get the sequencer handle , Hope this will help !!

P.S: There are many different ways to do the above the task, the above one is the one I am using.

In reply to karandeepsingh:

Thanks for your reply .

As I tried what you have suggested but again I am getting an error :

Following verilog source has syntax error :
token is ""
uvm_config_db#(SEQUENCER_MY)::set(null,
,“seqr_main”,env.ahb_system_env.sequencer);

In reply to withankitgarg:

When using the `uvm_do* macros, the second argument is the handle of the sequencer that you want your sequence to run on. In your code, you are passing the sequencer type, and not the sequencer handle.

You would want to do:


  `uvm_do_on(sequence_my_h, SEQUENCER_MY_h);
  `uvm_do_on(sequence_simple_h, SEQUENCER_VIRTUAL_h);

You will also need to set the handles of your sequencers prior to running the sequence.

Several other comments to guide you:

  1. Don’t call raise_objection() and drop_objection() in your sequences. Only use objections in your test run_phase().
  2. Don’t use the `uvm_do* macros(). Use the appropriate function calls for your sequence or sequence_item. In your case, it would make debugging your problem significantly easier.

In reply to cgales:

Thanks for your reply .

I have edited the part you suggested but actually I passed sequencers’ handles initially even then I got the same problem.

In reply to withankitgarg:

Do you have any more information as to where the error message is coming from? Are you sure it’s from the `uvm_do* macros? The message seems somewhat generic and non-identifying.

Try using the direct API calls to start your sequences and see if that helps you debug the issue.

In reply to cgales:

As karandeepsingh has answered this question. I think that is the reason for this error .
I have doubts because I have taken handles of sequencers in sequence but they are not connected to actual sequencers that’s why NULL OBJECT ACCESS problem would have arised .

I have tried his suggestion but I am getting the error as I have posted below .

Another Doubt that I have in my mind is that Sequence is an object and sequencers are components so can we take sequencers’ handle in sequence ?

In reply to withankitgarg:

You can pass the handles of the sequencers to the sequence. I would recommend creating the virtual sequence, assigning the sequencer handles, then starting the virtual sequence.

Can you show the code where you are starting the virtual sequence? If you are using a `uvm_do* macro, then you will have problems because your sequencer handles will be null.

In reply to withankitgarg:

I was not considering right syntax just intended to give you a hint so write the code free handed.

Anyway you can get the detail for how to use the function in the reference manual.

Function:
static function void set(uvm_component cntxt,
string inst_name,
string field_name,
T value )

So these are the above fields that can be set and get respectively as per you wish, it is same you name anything as per your choice.

eg: Cookbook–>
// Inside the env containing the target sequencers:
//
function void connect_phase(uvm_phase phase);
//
uvm_config_db #(a_sequencer)::set(null, “Sequencers”, “a_sqr”, a_agent.m_sequencer);
uvm_config_db #(b_sequencer)::set(null, “Sequencers”, “b_sqr”, b_agent.m_sequencer);
//
endfunction
// Inside the virtual sequence base class:
//
a_sequencer A;
b_sequencer B;
// Get the sequencer handles back from the config_db
//
task body();
if(!uvm_config_db #(a_sequencer)::get(null, “Sequencers”, “a_sqr”, A)) begin
uvm_error("body", "a_sqr of type a_sequencer not found in the uvm_config_db") end if(!uvm_config_db #(b_sequencer)::get(null, "Sequencers", "b_sqr", B)) begin uvm_error(“body”, “b_sqr of type b_sequencer not found in the uvm_config_db”)
end
// …
endtask

-Karandeep

In reply to withankitgarg:

In reply to karandeepsingh:
Thanks for your reply .
As I tried what you have suggested but again I am getting an error :
Following verilog source has syntax error :
token is ""
uvm_config_db#(SEQUENCER_MY)::set(null,
,“seqr_main”,env.ahb_system_env.sequencer);

You have resolved this by now i am sure, but replying so that newbies wont get confused; the particular error you are showing seems to be because you did not surround your “*” with quotes.