How to update the register model in uvm, when registers gets updated by the design internally and not through a bus access

UVM
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1

if registers are internally updated by the CPU, and we want to monitor that cpu write activity and update the register model in parallel, How do we do it?

2

In reply to sumanth291092:

A register that is modified internally by the design is normally considered a read-only (RO) register. The register model will be updated when you read the register.

3

Using the task mirror