How to test Injection Error case

UVM
,
1

Let assume that we test I2C DUT by UVM.
If I want to send a transaction into the DUT for test then we will know that that DUT is working correct or not. Because we know the expectation value.

But If I executed an Error injection test for test the DUT, then what I can expect the result?
Maybe the DUT to be in the Error situation and this error we already expected in action.

But How do we check in pass/fail about Error Injection test case?
We forced Error into the DUT, then DUT will reaction from it. Would I just check the DUT’s reaction for Error Injection test?

How to care about Error Injection test?

2

In reply to UVM_LOVE:

There should be no difference for error injection testing because the DUT needs to behave in an expected way regardless. For example, if you inject a parity error into the memory, the DUT would be expected to either detect or correct the error based on the specification. In some cases you might have to disable or downgrade some checkers so that they do not cause the test to fail.