How to make soft constraint for dynamic array type

UVM
,
1

i have made constraint for data_in variable in seq_item file.i need to overwrite my constraint so i have used “soft”.

class abc_pkt extends uvm_sequence_item;  
 rand bit [31:0] data_in[$:15];
 rand e_hburst m_hburst;

 constraint data_in_c{
                   (m_hburst == SINGLE) -> soft (data_in.size()==1);
	     
	            (m_hburst inside {WRAP4,INCR4}) -> soft (data_in.size()==4);
	            (m_hburst inside {WRAP8,INCR8}) -> soft (data_in.size()==8);
	            (m_hburst inside {WRAP16,INCR16}) -> soft (data_in.size()==16);
	           }
endclass

from sequence i have overwrite like below

class buf_wr_rd_seq extends abc_seq;
.
.
`uvm_do_with(req,{req.m_hburst == INCR16;req.m_hwrite == 1;req.m_haddr == t_haddr;req.data_in.size()== 40;})
endclass

but it is showing error like:
Solver failed when solving following set of constraints

rand bit[31:0] data_in.size(); // rand_mode = ON
rand ahb_pkt::e_hburst m_hburst; // rand_mode = ON

constraint data_in_c // (from this) (constraint_mode = ON) (…/cc/abc_seq_item.sv:105)
{
(m_hburst inside {ahb_pkt::e_hburst::WRAP16, ahb_pkt::e_hburst::INCR16}) → (data_in.size() == 16);
}
constraint WITH_CONSTRAINT // (from this) (constraint_mode = ON) (…/cc/abc_seq.sv:250)
{
(m_hburst == ahb_pkt::e_hburst::INCR16);
(data_in.size() == 40);
}
Error-[CNST-CIF] Constraints inconsistency failure
…/cc/abc_seq.sv, 250
Constraints are inconsistent and cannot be solved.
Please check the inconsistent constraints being printed above and rewrite
them.

thanks,

2

In reply to Rao.Bee:

A few questions:
(1) what is data_in[$:15]? Is it a dynamic array or is it any other array/queue? If this is a dynamic array you define it as

rand bit [31:0] data_in[];

(2) which data type is e_hburst?

3

1.i have declared data_in queue only.
2.

typedef enum bit [3:0] { SINGLE, INCR, WRAP4, INCR4, WRAP8, INCR8, WRAP16, INCR16,LE1} e_hburst;
4

In reply to Rao.Bee:

Thanks for responding.
In your headline you are saing you are using a dynamic array.
If it is a queue then you are declaring it as a queue of 16 entries data_in.
In your sequence you are defining
`uvm_do_with(req,{req.m_hburst == INCR16;req.m_hwrite == 1;req.m_haddr == t_haddr;req.data_in.size()== 40;}),
i.e. size of data_in is requested to be 40 which is not consistent with the definition.

5

In reply to chr_sue:

i have tried like that…means
rand bit [31:0] data_in[$:40];

but it is showing same error

thanks,

6

In reply to Rao.Bee:

Seeing only a small piece of code it is not so easy to give you an advice.
BTW a queue is an array which is growing and shrinking as needed. You do not have to define a size of the queue.