How to easily verify RISC-V core wit using reference model?

I am new about the verification of RISC-V core issues.

I must verify the RISCV32IM core with a verification system.

I wrote some testbench that includes some scnerios and assertions such as automatic testbench.

Although I watched some IMPERAS videos, I didn’t find a manual that tell about from ınstalling to how to verify a core with using Imperas System.

Could you please give me advices how to easily verify a core and if you know some sources, can you please share for me?

Regards, Omer KARSLIOGLU

I am trying to verify my RISC-V core. I am expecting some answers that show how to easily verify RISC-V core.