Suppose you are working with a module having one system clock and other is serial clock. And, if I am using a wishbone interface with it for verification purpose, please suggest how to handle two clocks(generated at diff frequencies) in the clocking block for the driver. How to drive different data accordingly with diff clock from the UVC driver via clocking block/modport. Is there any need to take 2 different clocking blockes for driving for types of signals (to be driven on system clock and serial clock).
Normally for verification of a DUT which has a bus interface at one end and at the other end, you would use two drivers, each with their own interface, each driver/interface handling the specific clock domain (either by SV clocking blocks as you suggest or as @posedge controls within the driver tasks).
In general, if you use clocking blocks, yes you would always need one per clock.