In reply to chr_sue:
Hi Chris
thanks. I modified the code with to pass a virtual interface. But i am getting Errors. Can you tell me what is wrong here?
class my_trans extends uvm_sequence_item;
`uvm_object_utils(my_trans)
// Members randomized towards DUT
rand logic [1:0] request;
// Members towards DUT which are not randomizedlogic reset;
logic clk;
// Members from DUT
logic [1:0] grant;
function new (string name = “my_trans”);
super.new (name);
endfunction:new
constraint req {$countones(request) == 1 ;}
endclass
class my_config extends uvm_object;
`uvm_object_utils(my_config)
virtual arb_if aif;
function new (string name = “my_config”);
super.new(name);
endfunction
endclass
class my_driver extends uvm_driver #(my_trans);
`uvm_component_utils (my_driver)
virtual arb_if aif;
function new (string name, uvm_component parent);
super.new(name,parent);
endfunction
function void build_phase (uvm_phase phase);
super.build_phase(phase);
endfunction
task run_phase (uvm_phase phase);
my_trans tr1;
forever begin
seq_item_port.get_next_item(tr1);
uvm_info("tb_driver", "Running stimilus to DUT", UVM_MEDIUM); // aif.clk <= 0; drive_tr(tr1); // aif.clk <=1; #10 uvm_info(“tb_driver”, “Waiting for it to get done”, UVM_MEDIUM);
seq_item_port.item_done();
end
endtask
task drive_tr (my_trans tr);
top.aif.request = tr.request;
top.aif.clk = tr.clk;
top.aif.reset = tr.reset;
endtask
endclass
class my_sequencer extends uvm_sequencer #(my_trans);
`uvm_component_utils (my_sequencer)
function new (string name, uvm_component parent);
super.new(name,parent);
endfunction
endclass
class my_env extends uvm_env;
`uvm_component_utils (my_env)
my_driver drv;
my_sequencer sqr;
my_config cfg;
function new (string name, uvm_component parent);
super.new(name,parent);
endfunction
function void build_phase (uvm_phase phase);
if (!uvm_config_db #(my_config)::get(this,“”,“config”,cfg)) begin
`uvm_error(“build_phase”, “Unable to find config object” )
end
super.build_phase (phase);
drv = my_driver::type_id::create (“drv”,this);
sqr = my_sequencer::type_id::create(“sqr”,this);
endfunction
function void connect_phase (uvm_phase phase);
super.connect_phase(phase);
drv.seq_item_port.connect(sqr.seq_item_export);
drv.arb_if = cfg.arb_if;
endfunction
endclass
class my_sequence extends uvm_sequence #(my_trans);
`uvm_object_utils (my_sequence)
my_config cfg;
function new (string name = “my_sequence”);
super.new (name);
endfunction:new
task body;
my_trans txn;
txn = my_trans::type_id::create(“txn”);
if (!uvm_config_db #(my_config)::get(this,“”,“config”,cfg)) begin
`uvm_error(“build_phase”, “Unable to find config object” )
end
// top.aif.reset=0;
//#5 top.aif.reset =1;
repeat (10) begin
// my_trans txn;
start_item (txn);
//txn = my_trans::type_id::create(“txn”,this);
assert(txn.randomize)
finish_item(txn);
end
endtask
endclass
class my_test extends uvm_test;
`uvm_component_utils (my_test);
my_env e;
my_config cfg;
function new (string name, uvm_component parent);
super.new(name,parent);
endfunction
function void build_phase (uvm_phase phase);
super.build_phase (phase);
e = my_env::type_id::create(“e”,this);
cfg = my_config::type_id::create(“cfg”);
uvm_config_db #(my_config)::set(this,“*”,“config”,cfg);
`uvm_info(“test1”,“Building my first UVM environemnt”, UVM_MEDIUM)
endfunction
task run_phase (uvm_phase phase);
my_sequence seq;
phase.raise_objection(this);
`uvm_info(“test1”, “*** Running my first UVM test”, UVM_HIGH)
seq = my_sequence::type_id::create(“seq”);
seq.start(e.sqr);
phase.drop_objection(this);
endtask
endclass
module top;
reg reset,clk;
reg [1:0]request;
wire [1:0] grant;
`include “uvm_macros.svh”
import uvm_pkg::;
//import tb_pkg::;
include "my_trans.sv" //include “tb_cover.sv”
include "my_config.sv" include “my_driver.sv”
include "my_sequencer.sv" //include “tb_cover.sv”
//include "tb_monitor.sv" include “my_env.sv”
//include "env_copy.sv" include “my_sequence.sv”
//include "tr_seq_copy.sv" include “my_test.sv”
//`include “tb_cover.sv”
//add_if aif();
//dut_if_wrapper dif_w;
arb_if aif();
//addr4 add4 (.a(aif.a),.b(aif.b),.c(aif.c),.rst(aif.rst));
arb arb1 (.request(aif.request),.grant(aif.grant),.reset(aif.reset),.clk(aif.clk));
initial begin
aif.clk =0;
forever begin
#5 aif.clk = ~aif.clk;
end
end
initial begin
// dif_w = new(aif);
// set_config_object(“*”, “dif_w”, dif_w,0);
aif.reset =0;
repeat(3) begin
@(posedge aif.clk);
end
aif.reset =1;
end
initial begin
uvm_config_db #(virtual arb_if)::set(null,“uvm_test_top”, “BUS_vif”, aif );
run_test();
end
endmodule
Here is the Error message :
Error-[MFNF] Member not found
my_env.sv, 27
“this.drv.”
Could not find member ‘arb_if’ in class ‘my_driver’, at “my_driver.sv”, 1.