Hi,I'm doing register model test right now.
I want to write from frontdoor, read from backdoor.
then, write from backdoor, read from frontdoor.
But because the dut didn't list every reg, but reg field in every register,
so I can't use the build in sequence uvm_reg_access_seq.
my solution is write 1 to the reg from frontdoor, then read every reg field using absolute path.
my definition of absolute path:
`define PDMEN_PATH tb_top.my_pdm.pdm_reg.pdmen_reg
but vcs will give warning below:
Individual field access not available for field . Accessing complete register instead.
How to solve this problem?