How to declare multiple imp port for write methods using `uvm_analysis_imp_decl(***)

UVM
,
1

Hi,

My reference model has to subscribe to N number of monitors of same class. If I have to use imp port to connect N monitors analysis exports, Is there any way I can do that in minimum amount of code or I have to declare write imp port for each of N subscriptions separately?

This is what my reference model has as of now,

// file : ref_model.sv
`uvm_analysis_imp_decl(_rcvd_1)
`uvm_analysis_imp_decl(_rcvd_2)
...
...
`uvm_analysis_imp_decl(_rcvd_N)
class my_reference_model extends uvm_component
..
endclass

Is it possible to declare these rcvd_1 to rcvd_N imp ports with some loop to reduce number of lines?

2

In reply to MilanKubavat:

this is not possible, consider use tlm_fifo array instead

3

In reply to Yuankun:

Yes. That’s my plan B. Just wanted to know if there was any way with imp port.
Thanks for the response Yuankun.

4

What is point of using array if you can’t implement write method. instead use macro define.
write``_rcvd_1()

5

In reply to nitin62goel:

You can declare an array of uvm_tlm_analysis_fifo instances, and each instance implements a write() method. Then you need a process that does a get() of all the instances, or a set of process that do a get() on each instance. Which way you choose depends on what your requirements are.

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