Hello my name is Daniel and i a new member in this forum, at this moment i’m doing my graduation project of electronics engineering. Currently i’m doing a verification environment for a microprocessor, this is the first stage because i only did the bus Agent with the SPI interface and a first version of the reference model (decoding and a part of the ISA).
I need help to do an active monitoring register model for verify the registers into the microprocessor using backdoor access. The architecture of the micro is the RISC-V 32I and it has a 32 general purpouse registers, so i need to check the countent of each register every time that the micro execute an instruction and sometimes the instruction is loaded from a memory inside the micro. For that reason i want to implement the active monitoring method because there is not always activity in the interface that change the values in the registers.
Each register has a unique field that stores a 32 bit data, so in my register block i have 32 registers and a reg map that have 32 directions for access to each one register.
Thanks.